Searched refs:intel_dkl_phy_read (Results 1 – 5 of 5) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/i915/display/ |
D | intel_dkl_phy.h | 17 intel_dkl_phy_read(struct drm_i915_private *i915, struct intel_dkl_phy_reg reg);
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D | intel_dkl_phy.c | 44 intel_dkl_phy_read(struct drm_i915_private *i915, struct intel_dkl_phy_reg reg) in intel_dkl_phy_read() function
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D | intel_dpll_mgr.c | 3626 hw_state->mg_refclkin_ctl = intel_dkl_phy_read(i915, in dkl_pll_get_hw_state() 3631 intel_dkl_phy_read(i915, DKL_CLKTOP2_HSCLKCTL(tc_port)); in dkl_pll_get_hw_state() 3639 intel_dkl_phy_read(i915, DKL_CLKTOP2_CORECLKCTL1(tc_port)); in dkl_pll_get_hw_state() 3643 hw_state->mg_pll_div0 = intel_dkl_phy_read(i915, DKL_PLL_DIV0(tc_port)); in dkl_pll_get_hw_state() 3649 hw_state->mg_pll_div1 = intel_dkl_phy_read(i915, DKL_PLL_DIV1(tc_port)); in dkl_pll_get_hw_state() 3653 hw_state->mg_pll_ssc = intel_dkl_phy_read(i915, DKL_PLL_SSC(tc_port)); in dkl_pll_get_hw_state() 3659 hw_state->mg_pll_bias = intel_dkl_phy_read(i915, DKL_PLL_BIAS(tc_port)); in dkl_pll_get_hw_state() 3664 intel_dkl_phy_read(i915, DKL_PLL_TDC_COLDST_BIAS(tc_port)); in dkl_pll_get_hw_state() 3848 val = intel_dkl_phy_read(i915, DKL_REFCLKIN_CTL(tc_port)); in dkl_pll_write() 3853 val = intel_dkl_phy_read(i915, DKL_CLKTOP2_CORECLKCTL1(tc_port)); in dkl_pll_write() [all …]
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D | intel_display_power_well.c | 537 if (wait_for(intel_dkl_phy_read(dev_priv, DKL_CMN_UC_DW_27(tc_port)) & in icl_tc_phy_aux_power_well_enable()
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D | intel_ddi.c | 2107 ln0 = intel_dkl_phy_read(dev_priv, DKL_DP_MODE(tc_port, 0)); in icl_program_mg_dp_mode() 2108 ln1 = intel_dkl_phy_read(dev_priv, DKL_DP_MODE(tc_port, 1)); in icl_program_mg_dp_mode()
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