| /linux-6.12.1/drivers/gpu/drm/i915/gt/ |
| D | selftest_tlb.c | 25 GEM_BUG_ON(addr < i915_vma_offset(vma)); in vma_set_qw()
26 GEM_BUG_ON(addr >= i915_vma_offset(vma) + i915_vma_size(vma) + sizeof(val)); in vma_set_qw()
28 (addr - i915_vma_offset(vma)), val, 1); in vma_set_qw()
74 GEM_BUG_ON(i915_vma_offset(va) != addr); in pte_tlbinv()
119 *cs++ = lower_32_bits(i915_vma_offset(vma)); in pte_tlbinv()
120 *cs++ = upper_32_bits(i915_vma_offset(vma)); in pte_tlbinv()
130 err = rq->engine->emit_bb_start(rq, i915_vma_offset(vma), 0, 0); in pte_tlbinv()
160 .start = i915_vma_offset(vb), in pte_tlbinv()
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| D | selftest_engine_cs.c | 184 i915_vma_offset(batch), 8, in perf_mi_bb_start()
328 i915_vma_offset(base), 8, in perf_mi_noop()
338 i915_vma_offset(nop), in perf_mi_noop()
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| D | selftest_lrc.c | 1031 *cs++ = lower_32_bits(i915_vma_offset(scratch) + x); in store_context()
1032 *cs++ = upper_32_bits(i915_vma_offset(scratch) + x); in store_context()
1099 *cs++ = lower_32_bits(i915_vma_offset(b_before)); in record_registers()
1100 *cs++ = upper_32_bits(i915_vma_offset(b_before)); in record_registers()
1115 *cs++ = lower_32_bits(i915_vma_offset(b_after)); in record_registers()
1116 *cs++ = upper_32_bits(i915_vma_offset(b_after)); in record_registers()
1237 *cs++ = lower_32_bits(i915_vma_offset(batch)); in poison_registers()
1238 *cs++ = upper_32_bits(i915_vma_offset(batch)); in poison_registers()
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| D | selftest_rps.c | 126 *cs++ = lower_32_bits(i915_vma_offset(vma) + end * sizeof(*cs)); in create_spin_counter()
127 *cs++ = upper_32_bits(i915_vma_offset(vma) + end * sizeof(*cs)); in create_spin_counter()
132 *cs++ = lower_32_bits(i915_vma_offset(vma) + loop * sizeof(*cs)); in create_spin_counter()
133 *cs++ = upper_32_bits(i915_vma_offset(vma) + loop * sizeof(*cs)); in create_spin_counter()
661 i915_vma_offset(vma), in live_rps_frequency_cs()
800 i915_vma_offset(vma), in live_rps_frequency_srm()
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| D | selftest_hangcheck.c | 99 return i915_vma_offset(hws) + in hws_address()
184 *batch++ = lower_32_bits(i915_vma_offset(vma)); in hang_create_request()
185 *batch++ = upper_32_bits(i915_vma_offset(vma)); in hang_create_request()
198 *batch++ = lower_32_bits(i915_vma_offset(vma)); in hang_create_request()
211 *batch++ = lower_32_bits(i915_vma_offset(vma)); in hang_create_request()
223 *batch++ = lower_32_bits(i915_vma_offset(vma)); in hang_create_request()
238 err = rq->engine->emit_bb_start(rq, i915_vma_offset(vma), PAGE_SIZE, flags); in hang_create_request()
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| D | selftest_workarounds.c | 522 u64 addr = i915_vma_offset(scratch); in check_dirty_whitelist()
641 i915_vma_offset(batch), PAGE_SIZE, in check_dirty_whitelist()
869 u64 offset = i915_vma_offset(results) + sizeof(u32) * i; in read_whitelisted_registers()
939 err = engine->emit_bb_start(rq, i915_vma_offset(batch), 0, 0); in scrub_whitelisted_registers()
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| D | intel_renderstate.c | 66 u64 r = s + i915_vma_offset(so->vma); in render_state_setup()
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| D | selftest_ring_submission.c | 53 *cs++ = i915_vma_offset(vma) + 4000; in create_wally()
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| D | selftest_execlists.c | 2744 *cs++ = lower_32_bits(i915_vma_offset(vma)); in create_gang()
2745 *cs++ = upper_32_bits(i915_vma_offset(vma)); in create_gang()
2748 u64 offset = i915_vma_offset((*prev)->batch); in create_gang()
2773 i915_vma_offset(vma), in create_gang()
3100 addr = i915_vma_offset(result) + offset + i * sizeof(*cs); in create_gpr_user()
3110 *cs++ = lower_32_bits(i915_vma_offset(result)); in create_gpr_user()
3111 *cs++ = upper_32_bits(i915_vma_offset(result)); in create_gpr_user()
3189 i915_vma_offset(batch), in create_gpr_client()
3520 i915_vma_offset(vma), in smoke_submit()
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| D | gen7_renderclear.c | 109 return i915_vma_offset(bc->vma); in batch_addr()
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| D | intel_lrc.c | 1417 *cs++ = lower_32_bits(i915_vma_offset(ce->vm->rsvd.vma)); in xehp_emit_fastcolor_blt_wabb()
1418 *cs++ = upper_32_bits(i915_vma_offset(ce->vm->rsvd.vma)); in xehp_emit_fastcolor_blt_wabb()
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| D | intel_ring_submission.c | 902 i915_vma_offset(engine->wa_ctx.vma), 0, in clear_residuals()
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| /linux-6.12.1/drivers/gpu/drm/i915/gem/selftests/ |
| D | i915_gem_client_blt.c | 193 *cs++ = lower_32_bits(i915_vma_offset(dst->vma)); in prepare_blit()
194 *cs++ = upper_32_bits(i915_vma_offset(dst->vma)); in prepare_blit()
197 *cs++ = lower_32_bits(i915_vma_offset(src->vma)); in prepare_blit()
198 *cs++ = upper_32_bits(i915_vma_offset(src->vma)); in prepare_blit()
239 *cs++ = lower_32_bits(i915_vma_offset(dst->vma)); in prepare_blit()
241 *cs++ = upper_32_bits(i915_vma_offset(dst->vma)); in prepare_blit()
244 *cs++ = lower_32_bits(i915_vma_offset(src->vma)); in prepare_blit()
246 *cs++ = upper_32_bits(i915_vma_offset(src->vma)); in prepare_blit()
455 if (drm_mm_node_allocated(&vma->node) && i915_vma_offset(vma) != addr) { in pin_buffer()
465 GEM_BUG_ON(i915_vma_offset(vma) != addr); in pin_buffer()
[all …]
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| D | igt_gem_utils.c | 66 offset += i915_vma_offset(vma); in igt_emit_store_dw()
146 i915_vma_offset(batch), in igt_gpu_fill_dw()
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| D | i915_gem_context.c | 927 *cmd++ = lower_32_bits(i915_vma_offset(vma)); in rpcs_query_batch()
928 *cmd++ = upper_32_bits(i915_vma_offset(vma)); in rpcs_query_batch()
1012 i915_vma_offset(batch), in emit_rpcs_query()
1572 err = engine->emit_bb_start(rq, i915_vma_offset(vma), in write_to_scratch()
1678 *cmd++ = i915_vma_offset(vma) + result; in read_from_scratch()
1705 err = engine->emit_bb_start(rq, i915_vma_offset(vma), in read_from_scratch()
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| D | huge_pages.c | 411 IS_ALIGNED(i915_vma_offset(vma), SZ_2M) && in igt_check_page_sizes()
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| /linux-6.12.1/drivers/gpu/drm/i915/selftests/ |
| D | igt_spinner.c | 119 return i915_vma_offset(hws) + seqno_offset(rq->fence.context); in hws_address()
193 *batch++ = lower_32_bits(i915_vma_offset(vma)); in igt_spinner_create_request()
194 *batch++ = upper_32_bits(i915_vma_offset(vma)); in igt_spinner_create_request()
209 err = engine->emit_bb_start(rq, i915_vma_offset(vma), PAGE_SIZE, flags); in igt_spinner_create_request()
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| D | i915_request.c | 1011 i915_vma_offset(batch), in emit_bb_start()
1148 *cmd++ = lower_32_bits(i915_vma_offset(vma)); in recursive_batch()
1149 *cmd++ = upper_32_bits(i915_vma_offset(vma)); in recursive_batch()
1152 *cmd++ = lower_32_bits(i915_vma_offset(vma)); in recursive_batch()
1155 *cmd++ = lower_32_bits(i915_vma_offset(vma)); in recursive_batch()
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| /linux-6.12.1/drivers/gpu/drm/i915/ |
| D | i915_vma.h | 167 static inline u64 i915_vma_offset(const struct i915_vma *vma) in i915_vma_offset() function
177 GEM_BUG_ON(upper_32_bits(i915_vma_offset(vma))); in i915_ggtt_offset()
178 GEM_BUG_ON(upper_32_bits(i915_vma_offset(vma) + in i915_ggtt_offset()
180 return lower_32_bits(i915_vma_offset(vma)); in i915_ggtt_offset()
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| D | i915_vma.c | 606 i915_vma_offset(vma), in i915_vma_pin_iomap()
700 if (alignment && !IS_ALIGNED(i915_vma_offset(vma), alignment)) in i915_vma_misplaced()
707 i915_vma_offset(vma) < (flags & PIN_OFFSET_MASK)) in i915_vma_misplaced()
711 i915_vma_offset(vma) != (flags & PIN_OFFSET_MASK)) in i915_vma_misplaced()
729 IS_ALIGNED(i915_vma_offset(vma), vma->fence_alignment)); in __i915_vma_set_map_and_fenceable()
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| D | i915_cmd_parser.c | 1474 shadow_addr = gen8_canonical_addr(i915_vma_offset(shadow)); in intel_engine_cmd_parser()
1475 batch_addr = gen8_canonical_addr(i915_vma_offset(batch) + batch_offset); in intel_engine_cmd_parser()
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| D | i915_debugfs.c | 213 i915_vma_offset(vma), i915_vma_size(vma), in i915_debugfs_describe_obj()
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| /linux-6.12.1/drivers/gpu/drm/i915/gem/ |
| D | i915_gem_execbuffer.c | 383 const u64 start = i915_vma_offset(vma); in eb_vma_misplaced()
676 if (entry->offset != i915_vma_offset(vma)) { in eb_reserve_vma()
677 entry->offset = i915_vma_offset(vma) | UPDATE; in eb_reserve_vma()
1033 if (entry->offset != i915_vma_offset(vma)) { in eb_validate_vmas()
1034 entry->offset = i915_vma_offset(vma) | UPDATE; in eb_validate_vmas()
1115 return gen8_canonical_addr((int)reloc->delta + i915_vma_offset(target)); in relocation_target()
1490 gen8_canonical_addr(i915_vma_offset(target->vma)) == reloc->presumed_offset) in eb_relocate_entry()
2412 i915_vma_offset(batch) + in eb_request_submit()
2423 i915_vma_offset(eb->trampoline) + in eb_request_submit()
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| /linux-6.12.1/drivers/gpu/drm/i915/gt/uc/ |
| D | intel_gsc_uc_heci_cmd_submit.c | 180 err = engine->emit_bb_start(rq, i915_vma_offset(pkt->bb_vma), PAGE_SIZE, 0); in intel_gsc_uc_heci_cmd_submit_nonpriv()
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| /linux-6.12.1/drivers/gpu/drm/i915/pxp/ |
| D | intel_pxp_gsccs.c | 99 pkt.addr_in = i915_vma_offset(exec_res->pkt_vma); in gsccs_send_message()
|