| /linux-6.12.1/drivers/gpu/drm/i915/display/ |
| D | intel_de.h | 19 __intel_de_read(struct intel_display *display, i915_reg_t reg) in __intel_de_read()
34 __intel_de_read8(struct intel_display *display, i915_reg_t reg) in __intel_de_read8()
50 i915_reg_t lower_reg, i915_reg_t upper_reg) in __intel_de_read64_2x32()
68 __intel_de_posting_read(struct intel_display *display, i915_reg_t reg) in __intel_de_posting_read()
79 __intel_de_write(struct intel_display *display, i915_reg_t reg, u32 val) in __intel_de_write()
90 ____intel_de_rmw_nowl(struct intel_display *display, i915_reg_t reg, in ____intel_de_rmw_nowl()
98 __intel_de_rmw(struct intel_display *display, i915_reg_t reg, u32 clear, in __intel_de_rmw()
115 i915_reg_t reg, in ____intel_de_wait_for_register_nowl()
124 __intel_de_wait(struct intel_display *display, i915_reg_t reg, in __intel_de_wait()
141 __intel_de_wait_fw(struct intel_display *display, i915_reg_t reg, in __intel_de_wait_fw()
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| D | intel_sdvo.h | 19 i915_reg_t sdvo_reg, enum pipe *pipe);
21 i915_reg_t reg, enum port port);
24 i915_reg_t sdvo_reg, enum pipe *pipe) in intel_sdvo_port_enabled()
29 i915_reg_t reg, enum port port) in intel_sdvo_init()
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| D | g4x_dp.h | 26 i915_reg_t dp_reg, enum port port,
29 i915_reg_t output_reg, enum port port);
44 i915_reg_t dp_reg, int port, in g4x_dp_port_enabled()
50 i915_reg_t output_reg, int port) in g4x_dp_init()
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| D | intel_dp_aux.c | 60 i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp); in intel_dp_aux_wait_done()
248 i915_reg_t ch_ctl, ch_data[5]; in intel_dp_aux_xfer()
543 static i915_reg_t vlv_aux_ctl_reg(struct intel_dp *intel_dp) in vlv_aux_ctl_reg()
559 static i915_reg_t vlv_aux_data_reg(struct intel_dp *intel_dp, int index) in vlv_aux_data_reg()
575 static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp) in g4x_aux_ctl_reg()
591 static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int index) in g4x_aux_data_reg()
607 static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp) in ilk_aux_ctl_reg()
625 static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int index) in ilk_aux_data_reg()
643 static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp) in skl_aux_ctl_reg()
662 static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index) in skl_aux_data_reg()
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| D | intel_vga.c | 17 static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915) in intel_vga_cntrl_reg()
31 i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv); in intel_vga_disable()
51 i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv); in intel_vga_redisable_power_on()
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| D | intel_ddi.h | 27 i915_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder,
29 i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder,
31 i915_reg_t hsw_chicken_trans_reg(struct drm_i915_private *i915,
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| D | g4x_hdmi.h | 20 i915_reg_t hdmi_reg, enum port port);
25 i915_reg_t hdmi_reg, int port) in g4x_hdmi_init()
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| D | intel_dmc_wl.h | 28 void intel_dmc_wl_get(struct intel_display *display, i915_reg_t reg);
29 void intel_dmc_wl_put(struct intel_display *display, i915_reg_t reg);
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| D | intel_crt.h | 17 i915_reg_t adpa_reg, enum pipe *pipe);
22 i915_reg_t adpa_reg, enum pipe *pipe) in intel_crt_port_enabled()
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| D | intel_lvds.h | 18 i915_reg_t lvds_reg, enum pipe *pipe);
24 i915_reg_t lvds_reg, enum pipe *pipe) in intel_lvds_port_enabled()
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| D | intel_dsb.h | 36 i915_reg_t reg, u32 val);
38 i915_reg_t reg, u32 mask, u32 val);
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| D | intel_display.h | 489 i915_reg_t data_m_reg, i915_reg_t data_n_reg,
490 i915_reg_t link_m_reg, i915_reg_t link_n_reg);
493 i915_reg_t data_m_reg, i915_reg_t data_n_reg,
494 i915_reg_t link_m_reg, i915_reg_t link_n_reg);
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| D | intel_pch_display.c | 40 i915_reg_t dp_reg) in assert_pch_dp_disabled()
59 i915_reg_t hdmi_reg) in assert_pch_hdmi_disabled()
115 enum port port, i915_reg_t hdmi_reg) in ibx_sanitize_pch_hdmi_port()
134 enum port port, i915_reg_t dp_reg) in ibx_sanitize_pch_dp_port()
248 i915_reg_t reg; in ilk_enable_pch_transcoder()
314 i915_reg_t reg; in ilk_disable_pch_transcoder()
418 i915_reg_t reg = TRANS_DP_CTL(pipe); in ilk_pch_enable()
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| D | intel_pps.c | 487 i915_reg_t pp_ctrl;
488 i915_reg_t pp_stat;
489 i915_reg_t pp_on;
490 i915_reg_t pp_off;
491 i915_reg_t pp_div;
523 static i915_reg_t
533 static i915_reg_t
609 i915_reg_t pp_stat_reg, pp_ctrl_reg; in wait_panel_status()
741 i915_reg_t pp_stat_reg, pp_ctrl_reg; in intel_pps_vdd_on_unlocked()
825 i915_reg_t pp_stat_reg, pp_ctrl_reg; in intel_pps_vdd_off_sync_unlocked()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/xe/compat-i915-headers/ |
| D | intel_uncore.h | 28 i915_reg_t i915_reg) in intel_uncore_read()
36 i915_reg_t i915_reg) in intel_uncore_read8()
44 i915_reg_t i915_reg) in intel_uncore_read16()
53 i915_reg_t i915_lower_reg, i915_reg_t i915_upper_reg) in intel_uncore_read64_2x32()
71 i915_reg_t i915_reg) in intel_uncore_posting_read()
79 i915_reg_t i915_reg, u32 val) in intel_uncore_write()
87 i915_reg_t i915_reg, u32 clear, u32 set) in intel_uncore_rmw()
95 i915_reg_t i915_reg, u32 mask, in intel_wait_for_register()
105 i915_reg_t i915_reg, u32 mask, in intel_wait_for_register_fw()
115 __intel_wait_for_register(struct intel_uncore *uncore, i915_reg_t i915_reg, in __intel_wait_for_register()
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| /linux-6.12.1/drivers/gpu/drm/i915/ |
| D | intel_uncore.h | 98 i915_reg_t r);
100 i915_reg_t r);
103 i915_reg_t r, bool trace);
105 i915_reg_t r, bool trace);
107 i915_reg_t r, bool trace);
109 i915_reg_t r, bool trace);
112 i915_reg_t r, u8 val, bool trace);
114 i915_reg_t r, u16 val, bool trace);
116 i915_reg_t r, u32 val, bool trace);
261 i915_reg_t reg, unsigned int op);
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| D | i915_irq.h | 43 void gen3_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg);
45 void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr,
46 i915_reg_t iir, i915_reg_t ier);
49 i915_reg_t imr, u32 imr_val,
50 i915_reg_t ier, u32 ier_val,
51 i915_reg_t iir);
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| D | i915_perf_types.h | 50 i915_reg_t oa_head_ptr;
51 i915_reg_t oa_tail_ptr;
52 i915_reg_t oa_buffer;
53 i915_reg_t oa_ctx_ctrl;
54 i915_reg_t oa_ctrl;
55 i915_reg_t oa_debug;
56 i915_reg_t oa_status;
73 i915_reg_t addr;
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| D | i915_hwmon.c | 34 i915_reg_t gt_perf_status;
35 i915_reg_t pkg_power_sku_unit;
36 i915_reg_t pkg_power_sku;
37 i915_reg_t pkg_rapl_limit;
38 i915_reg_t energy_status_all;
39 i915_reg_t energy_status_tile;
40 i915_reg_t fan_speed;
77 i915_reg_t reg, u32 clear, u32 set) in hwm_locked_with_pm_intel_uncore_rmw()
98 hwm_field_read_and_scale(struct hwm_drvdata *ddat, i915_reg_t rgadr, in hwm_field_read_and_scale()
140 i915_reg_t rgaddr; in hwm_energy()
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| D | i915_reg_defs.h | 265 } i915_reg_t; typedef
267 #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
283 _Generic((r), i915_reg_t: (r).reg, i915_mcr_reg_t: (r).reg)
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| D | intel_uncore.c | 1176 gen6_reg_write_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) in gen6_reg_write_fw_domains()
1756 const i915_reg_t reg, in __unclaimed_reg_debug()
1770 const i915_reg_t reg, in __unclaimed_previous_reg_debug()
1782 const i915_reg_t reg, const bool read) in unclaimed_reg_debug_header()
1798 const i915_reg_t reg, const bool read) in unclaimed_reg_debug_footer()
1809 vgpu_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \
1829 gen2_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \
1837 gen5_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \
1904 fwtable_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) \
1916 fwtable_reg_read_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) { in fwtable_reg_read_fw_domains()
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| D | i915_ioctl.c | 23 i915_reg_t offset_ldw;
24 i915_reg_t offset_udw;
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| /linux-6.12.1/drivers/gpu/drm/xe/display/ext/ |
| D | i915_irq.c | 10 void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr, in gen3_irq_reset()
11 i915_reg_t iir, i915_reg_t ier) in gen3_irq_reset()
28 void gen3_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg) in gen3_assert_iir_is_zero()
46 i915_reg_t imr, u32 imr_val, in gen3_irq_init()
47 i915_reg_t ier, u32 ier_val, in gen3_irq_init()
48 i915_reg_t iir) in gen3_irq_init()
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| /linux-6.12.1/drivers/gpu/drm/i915/gt/ |
| D | intel_gt_pm_irq.c | 18 i915_reg_t reg; in write_pm_imr()
65 i915_reg_t reg = GRAPHICS_VER(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR; in gen6_gt_pm_reset_iir()
79 i915_reg_t reg; in write_pm_ier()
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| /linux-6.12.1/drivers/gpu/drm/i915/selftests/ |
| D | mock_uncore.c | 29 nop_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace) { }
36 nop_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { return 0; }
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