/linux-6.12.1/arch/sparc/kernel/ |
D | sun4v_ivec.S | 20 mov INTRQ_CPU_MONDO_TAIL, %g4 21 ldxa [%g4] ASI_QUEUE, %g4 22 cmp %g2, %g4 27 ldxa [%g0] ASI_SCRATCHPAD, %g4 28 sub %g4, TRAP_PER_CPU_FAULT_INFO, %g4 33 sub %g4, %g5, %g3 46 ldx [%g4 + TRAP_PER_CPU_CPU_MONDO_PA], %g7 66 lduw [%g4 + TRAP_PER_CPU_CPU_MONDO_QMASK], %g4 67 and %g2, %g4, %g2 69 mov INTRQ_CPU_MONDO_HEAD, %g4 [all …]
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D | ktlb.S | 21 mov TLB_TAG_ACCESS, %g4 22 ldxa [%g4] ASI_IMMU, %g4 35 cmp %g4, %g5 39 KERN_TSB_LOOKUP_TL1(%g4, %g6, %g5, %g1, %g2, %g3, kvmap_itlb_load) 43 cmp %g4, %g5 47 cmp %g4, %g5 52 KERN_PGTABLE_WALK(%g4, %g5, %g2, kvmap_itlb_longpath) 96 mov FAULT_CODE_ITLB, %g4 99 OBP_TRANS_LOOKUP(%g4, %g5, %g2, %g3, kvmap_itlb_longpath) 109 OBP_TRANS_LOOKUP(%g4, %g5, %g2, %g3, kvmap_dtlb_longpath) [all …]
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D | spiterrs.S | 18 ldxa [%g0] ASI_AFSR, %g4 ! Get AFSR 30 or %g4, %g3, %g4 37 or %g4, %g3, %g4 55 or %g4, %g7, %g4 66 or %g4, %g7, %g4 77 stxa %g4, [%g0] ASI_AFSR 135 ldxa [%g0] ASI_AFSR, %g4 ! Get AFSR 138 andcc %g4, %g3, %g0 ! Check for UE 159 rdpr %pstate, %g4 160 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate [all …]
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D | misctrap.S | 34 mov DMMU_SFAR, %g4 35 ldxa [%g4] ASI_DMMU, %g4 55 mov TLB_SFSR, %g4 56 ldxa [%g4] ASI_DMMU, %g5 57 stxa %g0, [%g4] ASI_DMMU ! Clear FaultValid bit 59 mov DMMU_SFAR, %g4 60 ldxa [%g4] ASI_DMMU, %g4 73 mov TLB_SFSR, %g4 74 ldxa [%g4] ASI_DMMU, %g5 75 stxa %g0, [%g4] ASI_DMMU ! Clear FaultValid bit [all …]
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D | head_32.S | 110 mov %o7, %g4 ! Save %o7 122 mov %g4, %o7 /* Previous %o7. */ 159 ldd [%g3], %g4 160 std %g4, [%g1] 161 ldd [%g3+8], %g4 162 std %g4, [%g1+8] 170 ldd [%g2], %g4 171 std %g4, [%g3] 172 ldd [%g2 + 0x8], %g4 173 std %g4, [%g3 + 0x8] ! Copy proms handler [all …]
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D | sun4v_tlb_miss.S | 55 LOAD_ITLB_INFO(%g2, %g4, %g5) 56 COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_itlb_4v) 57 COMPUTE_TSB_PTR(%g1, %g4, PAGE_SHIFT, %g3, %g7) 80 mov %g4, %o0 ! vaddr 101 LOAD_DTLB_INFO(%g2, %g4, %g5) 102 COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_dtlb_4v) 103 COMPUTE_TSB_PTR(%g1, %g4, PAGE_SHIFT, %g3, %g7) 123 mov %g4, %o0 ! vaddr 146 mov FAULT_CODE_DTLB | FAULT_CODE_WRITE, %g4 176 COMPUTE_TSB_PTR(%g1, %g4, PAGE_SHIFT, %g5, %g7) [all …]
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D | tsb.S | 32 mov TLB_TAG_ACCESS, %g4 33 ldxa [%g4] ASI_DMMU, %g4 34 srlx %g4, PAGE_SHIFT, %g4 36 sllx %g4, PAGE_SHIFT, %g4 39 mov TLB_TAG_ACCESS, %g4 40 ldxa [%g4] ASI_IMMU, %g4 41 srlx %g4, PAGE_SHIFT, %g4 43 sllx %g4, PAGE_SHIFT, %g4 83 srlx %g4, REAL_HPAGE_SHIFT, %g6 98 srlx %g4, 22, %g6 [all …]
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D | trampoline_32.S | 61 srl %g3, 10, %g4 62 and %g4, 0xc, %g4 63 ld [%g5 + %g4], %g6 123 srl %g3, 1, %g4 124 ld [%g5 + %g4], %g6 178 srl %g3, 28, %g4 179 sll %g4, 2, %g4 180 ld [%g5 + %g4], %g6
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D | itlb_miss.S | 9 TSB_LOAD_QUAD(%g1, %g4) ! Load TSB entry 10 cmp %g4, %g6 ! Compare TAG 15 sethi %hi(_PAGE_EXEC_4U), %g4 16 andcc %g5, %g4, %g0 ! Executable?
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D | urtt_fill.S | 35 mov %g4, %l4 40 or %g4, FAULT_CODE_WINFIXUP, %g4 41 stb %g4, [%g6 + TI_FAULT_CODE] 61 ldx [%g6 + TI_TASK], %g4
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D | head_64.S | 329 ldub [%g1], %g4 330 cmp %g2, %g4 392 ldub [%g1], %g4 393 cmp %g2, %g4 408 ldub [%g1], %g4 409 cmp %g2, %g4 430 mov SUN4V_CHIP_NIAGARA3, %g4 433 mov SUN4V_CHIP_NIAGARA4, %g4 436 mov SUN4V_CHIP_NIAGARA5, %g4 439 mov SUN4V_CHIP_SPARC_M6, %g4 [all …]
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D | dtlb_prot.S | 25 mov TLB_TAG_ACCESS, %g4 ! For reload of vaddr 28 ldxa [%g4] ASI_DMMU, %g5 ! Put tagaccess in %g5 32 mov FAULT_CODE_DTLB | FAULT_CODE_WRITE, %g4
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D | cherrs.S | 186 rdpr %tstate, %g4 ! Read TSTATE for this level 187 andcc %g4, %g3, %g0 ! Interrupt globals in use? 237 rdpr %tstate, %g4 ! Read TSTATE for this level 238 andcc %g4, %g3, %g0 ! Interrupt globals in use? 308 or %g4, %g2, %g4 337 stx %g4, [%g1 + 0x0] 480 ldxa [%g0] ASI_AFSR, %g4 482 stxa %g4, [%g0] ASI_AFSR 516 ldxa [%g0] ASI_AFSR, %g4 518 stxa %g4, [%g0] ASI_AFSR [all …]
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D | winfixup.S | 28 or %g4, FAULT_CODE_WINFIXUP, %g4 29 stb %g4, [%g6 + TI_FAULT_CODE] 97 1: mov FAULT_CODE_WRITE | FAULT_CODE_DTLB | FAULT_CODE_WINFIXUP, %g4 98 stb %g4, [%g6 + TI_FAULT_CODE]
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/linux-6.12.1/arch/sparc/lib/ |
D | memcpy.S | 158 MOVE_BIGCHUNK(o1, o0, 0x00, o2, o3, o4, o5, g2, g3, g4, g5) 159 MOVE_BIGCHUNK(o1, o0, 0x20, o2, o3, o4, o5, g2, g3, g4, g5) 160 MOVE_BIGCHUNK(o1, o0, 0x40, o2, o3, o4, o5, g2, g3, g4, g5) 161 MOVE_BIGCHUNK(o1, o0, 0x60, o2, o3, o4, o5, g2, g3, g4, g5) 168 andcc %g1, 0x70, %g4 173 srl %g4, 1, %o4 174 add %g4, %o4, %o4 175 add %o1, %g4, %o1 178 add %o0, %g4, %o0 182 MOVE_LASTCHUNK(o1, o0, 0x60, g2, g3, g4, g5) [all …]
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D | checksum_32.S | 117 5: CSUM_BIGCHUNK(%o0, 0x00, %o2, %o4, %o5, %g2, %g3, %g4, %g5) 118 CSUM_BIGCHUNK(%o0, 0x20, %o2, %o4, %o5, %g2, %g3, %g4, %g5) 119 CSUM_BIGCHUNK(%o0, 0x40, %o2, %o4, %o5, %g2, %g3, %g4, %g5) 120 CSUM_BIGCHUNK(%o0, 0x60, %o2, %o4, %o5, %g2, %g3, %g4, %g5) 133 cptbl: CSUM_LASTCHUNK(%o0, 0x68, %o2, %g2, %g3, %g4, %g5) 134 CSUM_LASTCHUNK(%o0, 0x58, %o2, %g2, %g3, %g4, %g5) 135 CSUM_LASTCHUNK(%o0, 0x48, %o2, %g2, %g3, %g4, %g5) 136 CSUM_LASTCHUNK(%o0, 0x38, %o2, %g2, %g3, %g4, %g5) 137 CSUM_LASTCHUNK(%o0, 0x28, %o2, %g2, %g3, %g4, %g5) 138 CSUM_LASTCHUNK(%o0, 0x18, %o2, %g2, %g3, %g4, %g5) [all …]
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D | blockops.S | 77 MIRROR_BLOCK(%o0, %o1, 0x00, %o2, %o3, %o4, %o5, %g2, %g3, %g4, %g5) 78 MIRROR_BLOCK(%o0, %o1, 0x20, %o2, %o3, %o4, %o5, %g2, %g3, %g4, %g5) 79 MIRROR_BLOCK(%o0, %o1, 0x40, %o2, %o3, %o4, %o5, %g2, %g3, %g4, %g5) 80 MIRROR_BLOCK(%o0, %o1, 0x60, %o2, %o3, %o4, %o5, %g2, %g3, %g4, %g5) 81 MIRROR_BLOCK(%o0, %o1, 0x80, %o2, %o3, %o4, %o5, %g2, %g3, %g4, %g5) 82 MIRROR_BLOCK(%o0, %o1, 0xa0, %o2, %o3, %o4, %o5, %g2, %g3, %g4, %g5) 83 MIRROR_BLOCK(%o0, %o1, 0xc0, %o2, %o3, %o4, %o5, %g2, %g3, %g4, %g5) 84 MIRROR_BLOCK(%o0, %o1, 0xe0, %o2, %o3, %o4, %o5, %g2, %g3, %g4, %g5)
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D | locks.S | 38 mov %g4, %o7 62 mov %g4, %o7 74 mov %g4, %o7 86 mov %g4, %o7 98 mov %g4, %o7
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D | copy_user.S | 217 MOVE_BIGCHUNK(o1, o0, 0x00, o2, o3, o4, o5, g2, g3, g4, g5) 218 MOVE_BIGCHUNK(o1, o0, 0x20, o2, o3, o4, o5, g2, g3, g4, g5) 219 MOVE_BIGCHUNK(o1, o0, 0x40, o2, o3, o4, o5, g2, g3, g4, g5) 220 MOVE_BIGCHUNK(o1, o0, 0x60, o2, o3, o4, o5, g2, g3, g4, g5) 238 MOVE_LASTCHUNK(o1, o0, 0x60, g2, g3, g4, g5) 239 MOVE_LASTCHUNK(o1, o0, 0x50, g2, g3, g4, g5) 240 MOVE_LASTCHUNK(o1, o0, 0x40, g2, g3, g4, g5) 241 MOVE_LASTCHUNK(o1, o0, 0x30, g2, g3, g4, g5) 242 MOVE_LASTCHUNK(o1, o0, 0x20, g2, g3, g4, g5) 243 MOVE_LASTCHUNK(o1, o0, 0x10, g2, g3, g4, g5) [all …]
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/linux-6.12.1/arch/sparc/mm/ |
D | hypersparc.S | 28 WINDOW_FLUSH(%g4, %g5) 29 sethi %hi(vac_cache_size), %g4 30 ld [%g4 + %lo(vac_cache_size)], %g5 47 WINDOW_FLUSH(%g4, %g5) 56 add %o1, %g3, %g4 57 add %o1, %g4, %g5 69 sta %g0, [%o0 + %g4] ASI_M_FLUSH_USER 85 WINDOW_FLUSH(%g4, %g5) 98 sub %o2, %o1, %g4 102 cmp %g4, %g5 [all …]
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D | ultra.S | 534 srlx %g3, CTX_PGSZ1_NUC_SHIFT, %g4 535 sllx %g4, CTX_PGSZ1_NUC_SHIFT, %g4 536 or %g5, %g4, %g5 /* Preserve nucleus page size fields */ 538 mov 0x40, %g4 539 stxa %g0, [%g4] ASI_DMMU_DEMAP 540 stxa %g0, [%g4] ASI_IMMU_DEMAP 560 mov PRIMARY_CONTEXT, %g4 561 ldxa [%g4] ASI_DMMU, %g2 562 srlx %g2, CTX_PGSZ1_NUC_SHIFT, %g4 563 sllx %g4, CTX_PGSZ1_NUC_SHIFT, %g4 [all …]
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D | swift.S | 43 WINDOW_FLUSH(%g4, %g5) 59 WINDOW_FLUSH(%g4, %g5) 125 WINDOW_FLUSH(%g4, %g5) 150 add %g3, 512, %g4 158 sta %g0, [%o1 + %g4] ASI_M_FLUSH_PAGE 196 add %g3, 512, %g4 204 sta %g0, [%o1 + %g4] ASI_M_FLUSH_PAGE
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/linux-6.12.1/drivers/gpu/drm/i915/gt/shaders/clear_kernel/ |
D | hsw.asm | 64 mov(8) g4<1>UD g0<8,8,1>UD { align1 1Q }; /* Initialize messag… 65 mov(1) g4<1>UD g3.3<0,1,0>UD { align1 1N }; /* Block offset */ 66 mov(1) g4.1<1>UD g3.2<0,1,0>UD { align1 1N }; /* Block offset */ 67 mov(1) g4.2<1>UD 0x00000003UD { align1 1N }; /* Block size (1 row… 68 and(1) g4.3<1>UD g4.3<0,1,0>UW 0xffffffffUD { align1 1N }; 71 sendc(8) g5<1>UD g4<8,8,1>F 0x02190001 77 sendc(8) g5<1>UD g4<8,8,1>F 0x040a8001 98 mov(16) g4<1>UD 0x00000000UD { align1 1H };
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D | ivb.asm | 64 mov(8) g4<1>UD g0<8,8,1>UD { align1 1Q }; /* Initialize messag… 65 mov(1) g4<1>UD g3.3<0,1,0>UD { align1 1N }; /* Block offset */ 66 mov(1) g4.1<1>UD g3.2<0,1,0>UD { align1 1N }; /* Block offset */ 67 mov(1) g4.2<1>UD 0x00000003UD { align1 1N }; /* Block size (1 row… 68 and(1) g4.3<1>UD g4.3<0,1,0>UW 0xffffffffUD { align1 1N }; 71 sendc(8) g5<1>UD g4<8,8,1>F 0x02190001 76 sendc(8) g5<1>UD g4<8,8,1>F 0x040a8001 96 mov(16) g4<1>UD 0x00000000UD { align1 1H };
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/linux-6.12.1/arch/sparc/prom/ |
D | cif.S | 19 mov %g4, %l0 24 mov %l0, %g4 36 LOAD_PER_CPU_BASE(%g5, %g6, %g4, %g3, %o0) 37 ldx [%g6 + TI_TASK], %g4
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