Searched refs:enabled_cores_mask (Results 1 – 7 of 7) sorted by relevance
88 sdev->enabled_cores_mask |= BIT(ICL_DSP_HPRO_CORE_ID); in icl_dsp_post_fw_run()
195 sdev->enabled_cores_mask |= chip->init_core_mask; in cl_dsp_init()196 mask = sdev->enabled_cores_mask; in cl_dsp_init()
393 sdev->enabled_cores_mask = BIT(SOF_DSP_PRIMARY_CORE); in mtl_dsp_core_power_up()424 sdev->enabled_cores_mask = 0; in mtl_dsp_core_power_down()
128 sdev->enabled_cores_mask |= BIT(core); in snd_sof_dsp_core_get()157 sdev->enabled_cores_mask &= ~BIT(core); in snd_sof_dsp_core_put()
291 sdev->enabled_cores_mask = 0; in sof_suspend()
1100 core_cfg.enable_mask = sdev->enabled_cores_mask | BIT(core_idx); in sof_ipc3_set_core_state()1102 core_cfg.enable_mask = sdev->enabled_cores_mask & ~BIT(core_idx); in sof_ipc3_set_core_state()
638 u32 enabled_cores_mask; /* keep track of enabled cores */ member