Searched refs:dss1 (Results 1 – 3 of 3) sorted by relevance
2372 u32 dss1; in intel_ddi_mso_get_config() local2377 dss1 = intel_de_read(i915, ICL_PIPE_DSS_CTL1(pipe)); in intel_ddi_mso_get_config()2379 pipe_config->splitter.enable = dss1 & SPLITTER_ENABLE; in intel_ddi_mso_get_config()2388 switch (dss1 & SPLITTER_CONFIGURATION_MASK) { in intel_ddi_mso_get_config()2391 "Invalid splitter configuration, dss1=0x%08x\n", dss1); in intel_ddi_mso_get_config()2401 pipe_config->splitter.pixel_overlap = REG_FIELD_GET(OVERLAP_PIXELS_MASK, dss1); in intel_ddi_mso_get_config()2409 u32 dss1 = 0; in intel_ddi_mso_configure() local2415 dss1 |= SPLITTER_ENABLE; in intel_ddi_mso_configure()2416 dss1 |= OVERLAP_PIXELS(crtc_state->splitter.pixel_overlap); in intel_ddi_mso_configure()2418 dss1 |= SPLITTER_CONFIGURATION_2_SEGMENT; in intel_ddi_mso_configure()[all …]
183 dss1_alwon_fck: clock-dss1-alwon-fck-3430es1@0 {
192 dss1_alwon_fck: clock-dss1-alwon-fck-3430es2@0 {