Searched refs:dram_clock_change_latency_100ns (Results 1 – 10 of 10) sorted by relevance
354 if (bb_info.dram_clock_change_latency_100ns > 0) in dcn302_fpu_init_soc_bounding_box()356 bb_info.dram_clock_change_latency_100ns * 10; in dcn302_fpu_init_soc_bounding_box()
372 if (bb_info.dram_clock_change_latency_100ns > 0) in dcn303_fpu_init_soc_bounding_box()373 dcn3_03_soc.dram_clock_change_latency_us = bb_info.dram_clock_change_latency_100ns * 10; in dcn303_fpu_init_soc_bounding_box()
402 if (bb_info.dram_clock_change_latency_100ns > 0) in dcn301_fpu_init_soc_bounding_box()403 dcn3_01_soc.dram_clock_change_latency_us = bb_info.dram_clock_change_latency_100ns * 10; in dcn301_fpu_init_soc_bounding_box()
143 if (bb_info.dram_clock_change_latency_100ns > 0) in dcn401_update_bw_bounding_box_fpu()145 bb_info.dram_clock_change_latency_100ns * 10; in dcn401_update_bw_bounding_box_fpu()
333 uint32_t dram_clock_change_latency_100ns; member
803 if (bb_info.dram_clock_change_latency_100ns > 0) in patch_dcn30_soc_bounding_box()804 dcn3_0_soc.dram_clock_change_latency_us = bb_info.dram_clock_change_latency_100ns * 10; in patch_dcn30_soc_bounding_box()
666 if (bb_info.dram_clock_change_latency_100ns > 0) in dcn321_update_bw_bounding_box_fpu()669 bb_info.dram_clock_change_latency_100ns * 10; in dcn321_update_bw_bounding_box_fpu()
293 if (in_dc->ctx->dc_bios->bb_info.dram_clock_change_latency_100ns > 0) in dml21_apply_soc_bb_overrides()295 (in_dc->ctx->dc_bios->bb_info.dram_clock_change_latency_100ns + 9) / 10; in dml21_apply_soc_bb_overrides()
1132 soc_bb_info->dram_clock_change_latency_100ns = disp_cntl_tbl->max_mclk_chg_lat; in get_soc_bb_info_v4_4()1157 soc_bb_info->dram_clock_change_latency_100ns = disp_cntl_tbl->max_mclk_chg_lat; in get_soc_bb_info_v4_5()
3102 if (bb_info.dram_clock_change_latency_100ns > 0) in dcn32_update_bw_bounding_box_fpu()3105 bb_info.dram_clock_change_latency_100ns * 10; in dcn32_update_bw_bounding_box_fpu()