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Searched refs:display_v_start (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/msm/disp/mdp4/
Dmdp4_dsi_encoder.c35 uint32_t display_v_start, display_v_end; in mdp4_dsi_encoder_mode_set() local
56 display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dsi_hsync_skew; in mdp4_dsi_encoder_mode_set()
67 mdp4_write(mdp4_kms, REG_MDP4_DSI_DISPLAY_VSTART, display_v_start); in mdp4_dsi_encoder_mode_set()
Dmdp4_dtv_encoder.c35 uint32_t display_v_start, display_v_end; in mdp4_dtv_encoder_mode_set() local
60 display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dtv_hsync_skew; in mdp4_dtv_encoder_mode_set()
71 mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_VSTART, display_v_start); in mdp4_dtv_encoder_mode_set()
Dmdp4_lcdc_encoder.c209 uint32_t display_v_start, display_v_end; in mdp4_lcdc_encoder_mode_set() local
234 display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + lcdc_hsync_skew; in mdp4_lcdc_encoder_mode_set()
245 mdp4_write(mdp4_kms, REG_MDP4_LCDC_DISPLAY_VSTART, display_v_start); in mdp4_lcdc_encoder_mode_set()
/linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_intf.c106 u32 display_v_start, display_v_end; in dpu_hw_intf_setup_timing_engine() local
130 display_v_start = ((p->vsync_pulse_width + p->v_back_porch) * in dpu_hw_intf_setup_timing_engine()
147 active_v_start = display_v_start; in dpu_hw_intf_setup_timing_engine()
193 display_v_start += p->hsync_pulse_width + p->h_back_porch; in dpu_hw_intf_setup_timing_engine()
198 active_v_start = display_v_start; in dpu_hw_intf_setup_timing_engine()
229 DPU_REG_WRITE(c, INTF_DISPLAY_V_START_F0, display_v_start); in dpu_hw_intf_setup_timing_engine()
/linux-6.12.1/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5_encoder.c29 uint32_t display_v_start, display_v_end; in mdp5_vid_encoder_mode_set() local
78 display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dtv_hsync_skew; in mdp5_vid_encoder_mode_set()
87 display_v_start += mode->htotal - mode->hsync_start; in mdp5_vid_encoder_mode_set()
101 mdp5_write(mdp5_kms, REG_MDP5_INTF_DISPLAY_VSTART_F0(intf), display_v_start); in mdp5_vid_encoder_mode_set()
/linux-6.12.1/drivers/gpu/drm/msm/dp/
Ddp_catalog.c1009 u32 display_v_start, display_v_end; in dp_catalog_panel_tpg_enable() local
1019 display_v_start = ((drm_mode->vtotal - drm_mode->vsync_start) * in dp_catalog_panel_tpg_enable()
1025 display_v_start += drm_mode->htotal - drm_mode->hsync_start; in dp_catalog_panel_tpg_enable()
1049 dp_write_p0(catalog, MMSS_INTF_DISPLAY_V_START_F0, display_v_start); in dp_catalog_panel_tpg_enable()