Searched refs:dimB (Results 1 – 2 of 2) sorted by relevance
102 volatile unsigned long *dimB; in titan_update_irq_hw() local103 dimB = &cchip->dim0.csr; in titan_update_irq_hw()104 if (bcpu == 1) dimB = &cchip->dim1.csr; in titan_update_irq_hw()105 else if (bcpu == 2) dimB = &cchip->dim2.csr; in titan_update_irq_hw()106 else if (bcpu == 3) dimB = &cchip->dim3.csr; in titan_update_irq_hw()108 *dimB = mask | isa_enable; in titan_update_irq_hw()110 *dimB; in titan_update_irq_hw()
87 volatile unsigned long *dimB; in tsunami_update_irq_hw() local88 if (bcpu == 0) dimB = &cchip->dim0.csr; in tsunami_update_irq_hw()89 else if (bcpu == 1) dimB = &cchip->dim1.csr; in tsunami_update_irq_hw()90 else if (bcpu == 2) dimB = &cchip->dim2.csr; in tsunami_update_irq_hw()91 else dimB = &cchip->dim3.csr; in tsunami_update_irq_hw()93 *dimB = mask | isa_enable; in tsunami_update_irq_hw()95 *dimB; in tsunami_update_irq_hw()