Searched refs:dcef_table (Results 1 – 14 of 14) sorted by relevance
97 struct smu_14_0_dpm_table dcef_table; member
110 struct smu_11_0_dpm_table dcef_table; member
98 struct smu_13_0_dpm_table dcef_table; member
732 dpm_table = &(data->dpm_table.dcef_table); in vega12_setup_default_dpm_tables()1236 min_freq = data->dpm_table.dcef_table.dpm_state.hard_min_level; in vega12_upload_dpm_min_level()1927 dpm_table = &(data->dpm_table.dcef_table); in vega12_get_dcefclocks()2105 if (hard_min_level >= data->dpm_table.dcef_table.count) { in vega12_force_clock_level()2108 data->dpm_table.dcef_table.count - 1); in vega12_force_clock_level()2112 data->dpm_table.dcef_table.dpm_state.hard_min_level = in vega12_force_clock_level()2113 data->dpm_table.dcef_table.dpm_levels[hard_min_level].value; in vega12_force_clock_level()
131 struct vega12_single_dpm_table dcef_table; member
153 struct vega10_single_dpm_table dcef_table; member
1424 dpm_table = &(data->dpm_table.dcef_table); in vega10_setup_default_dpm_tables()4101 &data->dpm_table.dcef_table; in vega10_notify_smc_display_config_after_ps_adjustment()4689 struct vega10_single_dpm_table *dcef_table = &(data->dpm_table.dcef_table); in vega10_emit_clock_levels() local4752 for (i = 0; i < dcef_table->count; i++) in vega10_emit_clock_levels()4754 i, dcef_table->dpm_levels[i].value / 100, in vega10_emit_clock_levels()4755 (dcef_table->dpm_levels[i].value / 100 == now) ? in vega10_emit_clock_levels()4835 struct vega10_single_dpm_table *dcef_table = &(data->dpm_table.dcef_table); in vega10_print_clock_levels() local4896 for (i = 0; i < dcef_table->count; i++) in vega10_print_clock_levels()4898 i, dcef_table->dpm_levels[i].value / 100, in vega10_print_clock_levels()4899 (dcef_table->dpm_levels[i].value / 100 == now) ? in vega10_print_clock_levels()
184 struct vega20_single_dpm_table dcef_table; member
719 dpm_table = &(data->dpm_table.dcef_table); in vega20_setup_default_dpm_tables()1908 min_freq = data->dpm_table.dcef_table.dpm_state.hard_min_level; in vega20_upload_dpm_min_level()2688 if (hard_min_level >= data->dpm_table.dcef_table.count) { in vega20_force_clock_level()2691 data->dpm_table.dcef_table.count - 1); in vega20_force_clock_level()2695 data->dpm_table.dcef_table.dpm_state.hard_min_level = in vega20_force_clock_level()2696 data->dpm_table.dcef_table.dpm_levels[hard_min_level].value; in vega20_force_clock_level()2872 struct vega20_single_dpm_table *dpm_table = &(data->dpm_table.dcef_table); in vega20_get_dcefclocks()
707 dpm_table = &dpm_context->dpm_tables.dcef_table; in smu_v13_0_7_set_default_dpm_table()1233 single_dpm_table = &(dpm_context->dpm_tables.dcef_table); in smu_v13_0_7_print_clk_levels()
709 dpm_table = &dpm_context->dpm_tables.dcef_table; in smu_v13_0_0_set_default_dpm_table()1244 single_dpm_table = &(dpm_context->dpm_tables.dcef_table); in smu_v13_0_0_print_clk_levels()
643 dpm_table = &dpm_context->dpm_tables.dcef_table; in smu_v14_0_2_set_default_dpm_table()1113 single_dpm_table = &(dpm_context->dpm_tables.dcef_table); in smu_v14_0_2_print_clk_levels()
1064 dpm_table = &dpm_context->dpm_tables.dcef_table; in navi10_set_default_dpm_table()
1081 dpm_table = &dpm_context->dpm_tables.dcef_table; in sienna_cichlid_set_default_dpm_table()