/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
D | dcn31_clk_mgr.h | 42 bool dcn31_are_clock_states_equal(struct dc_clocks *a, 43 struct dc_clocks *b);
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D | dcn31_clk_mgr.c | 139 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn31_update_clocks() 300 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in dcn31_init_clocks() 309 bool dcn31_are_clock_states_equal(struct dc_clocks *a, in dcn31_are_clock_states_equal() 310 struct dc_clocks *b) in dcn31_are_clock_states_equal()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
D | dcn35_clk_mgr.h | 49 bool dcn35_are_clock_states_equal(struct dc_clocks *a, 50 struct dc_clocks *b);
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D | dcn35_clk_mgr.c | 256 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn35_notify_host_router_bw() 293 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn35_update_clocks() 470 bool dcn35_are_clock_states_equal(struct dc_clocks *a, in dcn35_are_clock_states_equal() 471 struct dc_clocks *b) in dcn35_are_clock_states_equal() 509 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in init_clk_states() 997 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn35_update_clocks_fpga()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
D | dcn314_clk_mgr.h | 50 bool dcn314_are_clock_states_equal(struct dc_clocks *a, 51 struct dc_clocks *b);
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D | dcn314_clk_mgr.c | 189 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in dcn314_init_clocks() 211 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn314_update_clocks() 369 bool dcn314_are_clock_states_equal(struct dc_clocks *a, in dcn314_are_clock_states_equal() 370 struct dc_clocks *b) in dcn314_are_clock_states_equal()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
D | rv1_clk_mgr.c | 36 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in rv1_init_clocks() 39 static int rv1_determine_dppclk_threshold(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_c… in rv1_determine_dppclk_threshold() 88 struct dc_clocks *new_clocks, in ramp_up_dispclk_with_dpp() 194 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in rv1_update_clocks()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/hw/ |
D | clk_mgr.h | 296 bool (*are_clock_states_equal) (struct dc_clocks *a, 297 struct dc_clocks *b); 329 struct dc_clocks clks;
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
D | dcn20_clk_mgr.c | 221 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn2_update_clocks() 349 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn2_update_clocks_fpga() 405 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in dcn2_init_clocks() 469 static bool dcn2_are_clock_states_equal(struct dc_clocks *a, in dcn2_are_clock_states_equal() 470 struct dc_clocks *b) in dcn2_are_clock_states_equal()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
D | dcn201_clk_mgr.c | 77 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in dcn201_init_clocks() 89 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn201_update_clocks()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
D | dcn30_clk_mgr.c | 113 memset(&(clk_mgr_base->clks), 0, sizeof(struct dc_clocks)); in dcn3_init_clocks() 197 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn3_update_clocks() 435 static bool dcn3_are_clock_states_equal(struct dc_clocks *a, in dcn3_are_clock_states_equal() 436 struct dc_clocks *b) in dcn3_are_clock_states_equal()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
D | dcn32_clk_mgr.c | 174 memset(&(clk_mgr_base->clks), 0, sizeof(struct dc_clocks)); in dcn32_init_clocks() 297 static void dcn32_update_dppclk_dispclk_freq(struct clk_mgr_internal *clk_mgr, struct dc_clocks *ne… in dcn32_update_dppclk_dispclk_freq() 506 struct dc_clocks *new_clocks, in dcn32_auto_dpm_test_log() 626 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn32_update_clocks() 1072 static bool dcn32_are_clock_states_equal(struct dc_clocks *a, in dcn32_are_clock_states_equal() 1073 struct dc_clocks *b) in dcn32_are_clock_states_equal()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
D | rn_clk_mgr.c | 136 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in rn_update_clocks() 447 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in rn_init_clocks() 528 static bool rn_are_clock_states_equal(struct dc_clocks *a, in rn_are_clock_states_equal() 529 struct dc_clocks *b) in rn_are_clock_states_equal()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
D | vg_clk_mgr.c | 100 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in vg_update_clocks() 379 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in vg_init_clocks() 465 static bool vg_are_clock_states_equal(struct dc_clocks *a, in vg_are_clock_states_equal() 466 struct dc_clocks *b) in vg_are_clock_states_equal()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
D | dcn401_clk_mgr.c | 220 memset(&(clk_mgr_base->clks), 0, sizeof(struct dc_clocks)); in dcn401_init_clocks() 385 struct dc_clocks *new_clocks, in dcn401_auto_dpm_test_log() 622 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn401_update_clocks_legacy() 936 struct dc_clocks *new_clocks, in dcn401_build_update_bandwidth_clocks_sequence() 1223 struct dc_clocks *new_clocks, in dcn401_build_update_display_clocks_sequence() 1480 struct dc_clocks new_clocks; in dcn401_set_hard_min_memclk() 1487 memcpy(&new_clocks, &clk_mgr_base->clks, sizeof(struct dc_clocks)); in dcn401_set_hard_min_memclk() 1557 static bool dcn401_are_clock_states_equal(struct dc_clocks *a, in dcn401_are_clock_states_equal() 1558 struct dc_clocks *b) in dcn401_are_clock_states_equal()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/ |
D | dm_helpers.h | 179 struct dc_clocks *clks);
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D | dc.h | 577 struct dc_clocks { struct
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/ |
D | core_types.h | 527 struct dc_clocks clk;
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D | dcn_calcs.h | 629 struct dc_clocks *clocks);
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
D | dcn316_clk_mgr.c | 141 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn316_update_clocks()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
D | dcn315_clk_mgr.c | 131 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn315_update_clocks()
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/linux-6.12.1/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_trace.h | 490 TP_PROTO(const struct dc_clocks *clk),
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D | amdgpu_dm_helpers.c | 1003 void dm_set_dcn_clocks(struct dc_context *ctx, struct dc_clocks *clks) in dm_set_dcn_clocks()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
D | dcn32_hwseq.c | 746 struct dc_clocks *clocks = &dc->current_state->bw_ctx.bw.dcn.clk; in dcn32_initialize_min_clocks()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
D | dcn401_hwseq.c | 53 struct dc_clocks *clocks = &dc->current_state->bw_ctx.bw.dcn.clk; in dcn401_initialize_min_clocks()
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