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Searched refs:clock_req (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_pp_smu.c602 struct pp_display_clock_request clock_req; in pp_nv_set_hard_min_dcefclk_by_freq() local
605 clock_req.clock_type = amd_pp_dcef_clock; in pp_nv_set_hard_min_dcefclk_by_freq()
606 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_hard_min_dcefclk_by_freq()
611 ret = amdgpu_dpm_display_clock_voltage_request(adev, &clock_req); in pp_nv_set_hard_min_dcefclk_by_freq()
625 struct pp_display_clock_request clock_req; in pp_nv_set_hard_min_uclk_by_freq() local
628 clock_req.clock_type = amd_pp_mem_clock; in pp_nv_set_hard_min_uclk_by_freq()
629 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_hard_min_uclk_by_freq()
634 ret = amdgpu_dpm_display_clock_voltage_request(adev, &clock_req); in pp_nv_set_hard_min_uclk_by_freq()
661 struct pp_display_clock_request clock_req; in pp_nv_set_voltage_by_freq() local
666 clock_req.clock_type = amd_pp_disp_clock; in pp_nv_set_voltage_by_freq()
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/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu10_hwmgr.c52 struct pp_display_clock_request *clock_req) in smu10_display_clock_voltage_request() argument
55 enum amd_pp_clock_type clk_type = clock_req->clock_type; in smu10_display_clock_voltage_request()
56 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in smu10_display_clock_voltage_request()
192 struct pp_display_clock_request clock_req; in smu10_set_clock_limit() local
195 clock_req.clock_type = amd_pp_dcf_clock; in smu10_set_clock_limit()
196 clock_req.clock_freq_in_khz = clocks.dcefClock * 10; in smu10_set_clock_limit()
198 PP_ASSERT_WITH_CODE(!smu10_display_clock_voltage_request(hwmgr, &clock_req), in smu10_set_clock_limit()
Dvega12_hwmgr.c1574 struct pp_display_clock_request *clock_req) in vega12_display_clock_voltage_request() argument
1578 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega12_display_clock_voltage_request()
1579 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in vega12_display_clock_voltage_request()
1621 struct pp_display_clock_request clock_req; in vega12_notify_smc_display_config_after_ps_adjustment() local
1635 clock_req.clock_type = amd_pp_dcef_clock; in vega12_notify_smc_display_config_after_ps_adjustment()
1636 clock_req.clock_freq_in_khz = min_clocks.dcefClock / 10; in vega12_notify_smc_display_config_after_ps_adjustment()
1637 if (!vega12_display_clock_voltage_request(hwmgr, &clock_req)) { in vega12_notify_smc_display_config_after_ps_adjustment()
Dvega20_hwmgr.c2299 struct pp_display_clock_request *clock_req) in vega20_display_clock_voltage_request() argument
2303 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega20_display_clock_voltage_request()
2304 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in vega20_display_clock_voltage_request()
2355 struct pp_display_clock_request clock_req; in vega20_notify_smc_display_config_after_ps_adjustment() local
2363 clock_req.clock_type = amd_pp_dcef_clock; in vega20_notify_smc_display_config_after_ps_adjustment()
2364 clock_req.clock_freq_in_khz = min_clocks.dcefClock * 10; in vega20_notify_smc_display_config_after_ps_adjustment()
2365 if (!vega20_display_clock_voltage_request(hwmgr, &clock_req)) { in vega20_notify_smc_display_config_after_ps_adjustment()
Dvega10_hwmgr.c4038 struct pp_display_clock_request *clock_req) in vega10_display_clock_voltage_request() argument
4041 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega10_display_clock_voltage_request()
4042 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in vega10_display_clock_voltage_request()
4108 struct pp_display_clock_request clock_req; in vega10_notify_smc_display_config_after_ps_adjustment() local
4127 clock_req.clock_type = amd_pp_dcef_clock; in vega10_notify_smc_display_config_after_ps_adjustment()
4128 clock_req.clock_freq_in_khz = dpm_table->dpm_levels[i].value * 10; in vega10_notify_smc_display_config_after_ps_adjustment()
4129 if (!vega10_display_clock_voltage_request(hwmgr, &clock_req)) { in vega10_notify_smc_display_config_after_ps_adjustment()
/linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/inc/
Dsmu_v11_0.h207 *clock_req);
Dsmu_v13_0.h186 *clock_req);
Damdgpu_smu.h1118 *clock_req);
/linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dsmu_v11_0.c1051 *clock_req) in smu_v11_0_display_clock_voltage_request()
1053 enum amd_pp_clock_type clk_type = clock_req->clock_type; in smu_v11_0_display_clock_voltage_request()
1056 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in smu_v11_0_display_clock_voltage_request()
Dnavi10_ppt.c2095 struct pp_display_clock_request clock_req; in navi10_notify_smc_display_config() local
2103 clock_req.clock_type = amd_pp_dcef_clock; in navi10_notify_smc_display_config()
2104 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10; in navi10_notify_smc_display_config()
2106 ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req); in navi10_notify_smc_display_config()
Dsienna_cichlid_ppt.c1800 struct pp_display_clock_request clock_req; in sienna_cichlid_notify_smc_display_config() local
1808 clock_req.clock_type = amd_pp_dcef_clock; in sienna_cichlid_notify_smc_display_config()
1809 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10; in sienna_cichlid_notify_smc_display_config()
1811 ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req); in sienna_cichlid_notify_smc_display_config()
/linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dsmu_v13_0.c1081 *clock_req) in smu_v13_0_display_clock_voltage_request()
1083 enum amd_pp_clock_type clk_type = clock_req->clock_type; in smu_v13_0_display_clock_voltage_request()
1086 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in smu_v13_0_display_clock_voltage_request()
/linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/
Damdgpu_smu.c3223 struct pp_display_clock_request *clock_req) in smu_display_clock_voltage_request() argument
3232 ret = smu->ppt_funcs->display_clock_voltage_request(smu, clock_req); in smu_display_clock_voltage_request()