Home
last modified time | relevance | path

Searched refs:cfgPCIE_LANE_3_EQUALIZATION_CNTL (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/nbif/
Dnbif_6_1_offset.h160 #define cfgPCIE_LANE_3_EQUALIZATION_CNTL … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_0_offset.h528 #define cfgPCIE_LANE_3_EQUALIZATION_CNTL … macro