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Searched refs:amdgpu_reset_control (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_reset.h60 int (*prepare_env)(struct amdgpu_reset_control *reset_ctl,
62 int (*prepare_hwcontext)(struct amdgpu_reset_control *reset_ctl,
64 int (*perform_reset)(struct amdgpu_reset_control *reset_ctl,
66 int (*restore_hwcontext)(struct amdgpu_reset_control *reset_ctl,
68 int (*restore_env)(struct amdgpu_reset_control *reset_ctl,
74 struct amdgpu_reset_control { struct
83 struct amdgpu_reset_control *reset_ctl, argument
Dsmu_v13_0_10.c32 static bool smu_v13_0_10_is_mode2_default(struct amdgpu_reset_control *reset_ctl) in smu_v13_0_10_is_mode2_default()
42 smu_v13_0_10_get_reset_handler(struct amdgpu_reset_control *reset_ctl, in smu_v13_0_10_get_reset_handler()
98 smu_v13_0_10_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl, in smu_v13_0_10_mode2_prepare_hwcontext()
118 struct amdgpu_reset_control *reset_ctl = in smu_v13_0_10_async_reset()
119 container_of(work, struct amdgpu_reset_control, reset_work); in smu_v13_0_10_async_reset()
132 smu_v13_0_10_mode2_perform_reset(struct amdgpu_reset_control *reset_ctl, in smu_v13_0_10_mode2_perform_reset()
230 smu_v13_0_10_mode2_restore_hwcontext(struct amdgpu_reset_control *reset_ctl, in smu_v13_0_10_mode2_restore_hwcontext()
281 struct amdgpu_reset_control *reset_ctl; in smu_v13_0_10_reset_init()
Dsienna_cichlid.c34 static bool sienna_cichlid_is_mode2_default(struct amdgpu_reset_control *reset_ctl) in sienna_cichlid_is_mode2_default()
47 sienna_cichlid_get_reset_handler(struct amdgpu_reset_control *reset_ctl, in sienna_cichlid_get_reset_handler()
99 sienna_cichlid_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl, in sienna_cichlid_mode2_prepare_hwcontext()
119 struct amdgpu_reset_control *reset_ctl = in sienna_cichlid_async_reset()
120 container_of(work, struct amdgpu_reset_control, reset_work); in sienna_cichlid_async_reset()
141 sienna_cichlid_mode2_perform_reset(struct amdgpu_reset_control *reset_ctl, in sienna_cichlid_mode2_perform_reset()
235 sienna_cichlid_mode2_restore_hwcontext(struct amdgpu_reset_control *reset_ctl, in sienna_cichlid_mode2_restore_hwcontext()
290 struct amdgpu_reset_control *reset_ctl; in sienna_cichlid_reset_init()
Daldebaran.c34 static bool aldebaran_is_mode2_default(struct amdgpu_reset_control *reset_ctl) in aldebaran_is_mode2_default()
46 aldebaran_get_reset_handler(struct amdgpu_reset_control *reset_ctl, in aldebaran_get_reset_handler()
104 aldebaran_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl, in aldebaran_mode2_prepare_hwcontext()
121 struct amdgpu_reset_control *reset_ctl = in aldebaran_async_reset()
122 container_of(work, struct amdgpu_reset_control, reset_work); in aldebaran_async_reset()
144 aldebaran_mode2_perform_reset(struct amdgpu_reset_control *reset_ctl, in aldebaran_mode2_perform_reset()
326 aldebaran_mode2_restore_hwcontext(struct amdgpu_reset_control *reset_ctl, in aldebaran_mode2_restore_hwcontext()
424 struct amdgpu_reset_control *reset_ctl; in aldebaran_reset_init()
Damdgpu.h325 struct amdgpu_reset_control;
1135 struct amdgpu_reset_control *reset_cntl;