Searched refs:VPU_40XX_HOST_SS_ICB_STATUS_1 (Results 1 – 2 of 2) sorted by relevance
89 #define VPU_40XX_HOST_SS_ICB_STATUS_1 0x00010214u macro
47 #define ICB_1_IRQ_MASK_40XX ((REG_FLD(VPU_40XX_HOST_SS_ICB_STATUS_1, CPU_INT_REDIRECT_2_INT)) | \48 (REG_FLD(VPU_40XX_HOST_SS_ICB_STATUS_1, CPU_INT_REDIRECT_3_INT)) | \49 (REG_FLD(VPU_40XX_HOST_SS_ICB_STATUS_1, CPU_INT_REDIRECT_4_INT)))