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Searched refs:VM_CONTEXT0_PAGE_TABLE_BASE_ADDR (Results 1 – 16 of 16) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/radeon/
Dsi_dma.c192 radeon_ring_write(ring, (0xf << 16) | ((VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm_id << 2)) >> 2)); in si_dma_vm_flush()
Dni_dma.c452 radeon_ring_write(ring, (0xf << 16) | ((VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm_id << 2)) >> 2)); in cayman_dma_vm_flush()
Dni.c1281 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in cayman_pcie_gart_enable()
1301 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2), in cayman_pcie_gart_enable()
1338 VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2)); in cayman_pcie_gart_disable()
2666 radeon_ring_write(ring, PACKET0(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm_id << 2), 0)); in cayman_vm_flush()
Drv770d.h638 #define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x153C macro
Dcik_sdma.c952 radeon_ring_write(ring, (VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm_id << 2)) >> 2); in cik_dma_vm_flush()
Dnid.h166 #define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x153C macro
Dsid.h443 #define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x153c macro
Dcikd.h565 #define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x153c macro
Dsi.c4298 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in si_pcie_gart_enable()
4319 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2), in si_pcie_gart_enable()
4360 reg = VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2); in si_pcie_gart_disable()
5066 (VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm_id << 2)) >> 2); in si_vm_flush()
Drv770.c928 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in rv770_pcie_gart_enable()
Devergreend.h1142 #define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x153C macro
Dcik.c5452 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in cik_pcie_gart_enable()
5469 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2), in cik_pcie_gart_enable()
5543 reg = VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2); in cik_pcie_gart_disable()
5687 (VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm_id << 2)) >> 2); in cik_vm_flush()
Dr600d.h579 #define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x1574 macro
Dr600.c1170 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in r600_pcie_gart_enable()
Devergreen.c2443 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in evergreen_pcie_gart_enable()
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsid.h444 #define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x54F macro