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Searched refs:UVD_CGC_GATE__MPC_MASK (Results 1 – 25 of 25) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Duvd_v6_0.c655 UVD_CGC_GATE__MPC_MASK |
688 UVD_CGC_GATE__MPC_MASK |
1312 UVD_CGC_GATE__MPC_MASK | in uvd_v6_0_enable_clock_gating()
1400 UVD_CGC_GATE__MPC_MASK |
Duvd_v5_0.c655 UVD_CGC_GATE__MPC_MASK | in uvd_v5_0_enable_clock_gating()
742 UVD_CGC_GATE__MPC_MASK |
Dvcn_v4_0_5.c669 | UVD_CGC_GATE__MPC_MASK in vcn_v4_0_5_disable_clock_gating()
Duvd_v7_0.c1684 UVD_CGC_GATE__MPC_MASK |
Dvcn_v4_0_3.c589 | UVD_CGC_GATE__MPC_MASK in vcn_v4_0_3_disable_clock_gating()
Dvcn_v1_0.c533 | UVD_CGC_GATE__MPC_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_0.c561 | UVD_CGC_GATE__MPC_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v4_0.c733 | UVD_CGC_GATE__MPC_MASK in vcn_v4_0_disable_clock_gating()
Dvcn_v2_5.c648 | UVD_CGC_GATE__MPC_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v3_0.c767 | UVD_CGC_GATE__MPC_MASK in vcn_v3_0_disable_clock_gating()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h406 #define UVD_CGC_GATE__MPC_MASK … macro
Duvd_3_1_sh_mask.h141 #define UVD_CGC_GATE__MPC_MASK 0x200 macro
Duvd_4_0_sh_mask.h88 #define UVD_CGC_GATE__MPC_MASK 0x00000200L macro
Duvd_4_2_sh_mask.h141 #define UVD_CGC_GATE__MPC_MASK 0x200 macro
Duvd_5_0_sh_mask.h153 #define UVD_CGC_GATE__MPC_MASK 0x200 macro
Duvd_6_0_sh_mask.h155 #define UVD_CGC_GATE__MPC_MASK 0x200 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h834 #define UVD_CGC_GATE__MPC_MASK … macro
Dvcn_2_5_sh_mask.h1904 #define UVD_CGC_GATE__MPC_MASK … macro
Dvcn_2_0_0_sh_mask.h1853 #define UVD_CGC_GATE__MPC_MASK … macro
Dvcn_2_6_0_sh_mask.h3575 #define UVD_CGC_GATE__MPC_MASK … macro
Dvcn_3_0_0_sh_mask.h2634 #define UVD_CGC_GATE__MPC_MASK … macro
Dvcn_5_0_0_sh_mask.h69 #define UVD_CGC_GATE__MPC_MASK … macro
Dvcn_4_0_5_sh_mask.h65 #define UVD_CGC_GATE__MPC_MASK … macro
Dvcn_4_0_0_sh_mask.h69 #define UVD_CGC_GATE__MPC_MASK … macro
Dvcn_4_0_3_sh_mask.h69 #define UVD_CGC_GATE__MPC_MASK … macro