Home
last modified time | relevance | path

Searched refs:SDMA1_RLC0_RB_CNTL__RB_PRIV__SHIFT (Results 1 – 10 of 10) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h1444 #define SDMA1_RLC0_RB_CNTL__RB_PRIV__SHIFT 0x17 macro
Dsdma1_4_2_sh_mask.h1450 #define SDMA1_RLC0_RB_CNTL__RB_PRIV__SHIFT … macro
Dsdma1_4_2_2_sh_mask.h1458 #define SDMA1_RLC0_RB_CNTL__RB_PRIV__SHIFT … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1650 #define SDMA1_RLC0_RB_CNTL__RB_PRIV__SHIFT 0x17 macro
Doss_2_4_sh_mask.h1850 #define SDMA1_RLC0_RB_CNTL__RB_PRIV__SHIFT 0x17 macro
Doss_3_0_1_sh_mask.h2796 #define SDMA1_RLC0_RB_CNTL__RB_PRIV__SHIFT 0x17 macro
Doss_3_0_sh_mask.h2910 #define SDMA1_RLC0_RB_CNTL__RB_PRIV__SHIFT 0x17 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h4060 #define SDMA1_RLC0_RB_CNTL__RB_PRIV__SHIFT … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_sh_mask.h4006 #define SDMA1_RLC0_RB_CNTL__RB_PRIV__SHIFT … macro
Dgc_10_3_0_sh_mask.h4179 #define SDMA1_RLC0_RB_CNTL__RB_PRIV__SHIFT … macro