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Searched refs:SDMA0_BASE__INST0_SEG3 (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dvega20_ip_offset.h673 #define SDMA0_BASE__INST0_SEG3 0 macro
Dsienna_cichlid_ip_offset.h875 #define SDMA0_BASE__INST0_SEG3 0x02402C00 macro
Dbeige_goby_ip_offset.h1030 #define SDMA0_BASE__INST0_SEG3 0x02402C00 macro
Drenoir_ip_offset.h1118 #define SDMA0_BASE__INST0_SEG3 0 macro
Dvega10_ip_offset.h996 #define SDMA0_BASE__INST0_SEG3 0 macro
Dyellow_carp_offset.h1123 #define SDMA0_BASE__INST0_SEG3 0 macro
Darct_ip_offset.h919 #define SDMA0_BASE__INST0_SEG3 0 macro
Daldebaran_ip_offset.h1202 #define SDMA0_BASE__INST0_SEG3 0 macro