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Searched refs:SDMA0_BASE__INST0_SEG1 (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dvega20_ip_offset.h671 #define SDMA0_BASE__INST0_SEG1 0 macro
Dsienna_cichlid_ip_offset.h873 #define SDMA0_BASE__INST0_SEG1 0x0000A000 macro
Dbeige_goby_ip_offset.h1028 #define SDMA0_BASE__INST0_SEG1 0x0000A000 macro
Drenoir_ip_offset.h1116 #define SDMA0_BASE__INST0_SEG1 0x0240A800 macro
Dvega10_ip_offset.h994 #define SDMA0_BASE__INST0_SEG1 0 macro
Dyellow_carp_offset.h1121 #define SDMA0_BASE__INST0_SEG1 0x0000A000 macro
Darct_ip_offset.h917 #define SDMA0_BASE__INST0_SEG1 0x00012540 macro
Daldebaran_ip_offset.h1200 #define SDMA0_BASE__INST0_SEG1 0x02445400 macro