| /linux-6.12.1/arch/arm/mach-sa1100/ |
| D | assabet.c | 117 #define SCK GPIO_GPIO(18) macro
122 GPSR = SCK; in adv7171_start()
131 GPSR = SCK; in adv7171_stop()
142 GPCR = SCK; in adv7171_send()
149 GPSR = SCK; in adv7171_send()
152 GPCR = SCK; in adv7171_send()
157 GPSR = SCK; in adv7171_send()
162 GPCR = SCK | SDA; in adv7171_send()
176 GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */ in adv7171_write()
177 GPDR = (GPDR | SCK | MOD) & ~SDA; in adv7171_write()
[all …]
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| /linux-6.12.1/Documentation/iio/ |
| D | ad7944.rst | 40 | SCK | | |
62 | SCK | | |
82 | | SCK | | SCK | | |
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| D | ad4000.rst | 59 | SCK | | |
84 | SCK | | |
101 | SCK | | |
127 | SCK | | |
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| /linux-6.12.1/drivers/mfd/ |
| D | mt6358-irq.c | 25 MT6357_TOP_GEN(SCK),
36 MT6358_TOP_GEN(SCK),
47 MT6359_TOP_GEN(SCK),
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| /linux-6.12.1/Documentation/spi/ |
| D | butterfly.rst | 34 SCK J403.PB1/SCK pin 2/D0
67 SCK J403.PE4/USCK pin 5/D3
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| D | spi-summary.rst | 14 The three signal wires hold a clock (SCK, often on the order of 10 MHz),
62 chips described as using "three wire" signaling: SCK, data, nCSx.
506 SPI bus (shared SCK, MOSI, MISO). Valid bus numbers start at zero. On
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| /linux-6.12.1/arch/arm/boot/dts/microchip/ |
| D | lan966x-kontron-kswitch-d10-mmt.dtsi | 56 /* SCK, MISO, MOSI */
80 /* SCK, D0, D1 */
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| D | lan966x-pcb8291.dts | 74 /* SCK, D0, D1, LD */
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| D | lan966x-pcb8309.dts | 160 /* SCK, D0, D1, LD */
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| /linux-6.12.1/Documentation/devicetree/bindings/fpga/ |
| D | lattice-ice40-fpga-mgr.txt | 10 FPGA will enter Master SPI mode and drive SCK with a
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| /linux-6.12.1/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxl-s905x-khadas-vim.dts | 194 "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
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| D | meson-gxbb-nanopi-k2.dts | 271 "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
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| D | meson-gxbb-odroidc2.dts | 312 "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
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| /linux-6.12.1/Documentation/devicetree/bindings/leds/ |
| D | leds-bcm6358.txt | 16 - brcm,clk-div : SCK signal divider. Possible values are 1, 2, 4 and 8.
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| /linux-6.12.1/arch/arm/boot/dts/st/ |
| D | stm32mp135f-dhcor-dhsbc.dts | 277 &sai1 { /* Expansion connector: SCK-A:pin12 FS-A:pin35 SD-A:pin38 SD-B:pin40 */
303 &spi3 { /* Expansion connector: MOSI:pin19 MISO:pin21 SCK:pin22 nCS:pin24 */
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| D | ste-nomadik-nhk15.dts | 208 * As we're dealing with 3wire SPI, we only define SCK
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| /linux-6.12.1/Documentation/driver-api/ |
| D | spi.rst | 6 multiplexed shift register. Its three signal wires hold a clock (SCK,
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| /linux-6.12.1/arch/arm/boot/dts/allwinner/ |
| D | sun7i-a20-bananapi.dts | 209 "PMU-SCK", "PMU-SDA", "", "", "", "", "", "",
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| D | sun6i-a31s-sinovoip-bpi-m2.dts | 325 "PMU-SCK", "PMU-SDA", "VBAT-EN", "", "IR-RX",
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| /linux-6.12.1/arch/arm/boot/dts/intel/pxa/ |
| D | pxa300-raumfeld-common.dtsi | 331 MFP_PIN_PXA300(95) MFP_AF0 /* SCK */
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| /linux-6.12.1/Documentation/driver-api/gpio/ |
| D | intro.rst | 111 delays the rising edge of SCK, and the I2C master adjusts its signaling rate
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| D | drivers-on-gpio.rst | 59 of wires, at least SCK and optionally MISO, MOSI and chip select lines) using
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| /linux-6.12.1/drivers/spi/ |
| D | Kconfig | 455 interface to manage MOSI, MISO, SCK, and chipselect signals. SPI
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