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Searched refs:R_ANAPAR_PW15 (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/net/wireless/realtek/rtw89/
Drtw8852bt_rfk.c325 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, MASKBYTE3, 0x1f); in _rfk_bb_afe_setting()
327 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, MASKBYTE3, 0x13); in _rfk_bb_afe_setting()
643 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, BIT(28), 0x1); in _dack_s0()
692 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, BIT(28), 0x1); in _dack_s1()
790 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xf); in _addck_ori()
795 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0x3); in _addck_ori()
813 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xc); in _addck_ori()
828 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xf); in _addck_ori()
833 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0x3); in _addck_ori()
851 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xc); in _addck_ori()
[all …]
Drtw8852b_rfk.c523 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xf); in _addck()
526 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0x3); in _addck()
548 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xc); in _addck()
557 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xf); in _addck()
560 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0x3); in _addck()
582 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xc); in _addck()
984 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x0f); in _iqk_rxclk_setting()
986 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x03); in _iqk_rxclk_setting()
1000 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x0f); in _iqk_rxclk_setting()
1002 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x03); in _iqk_rxclk_setting()
[all …]
Drtw8852a_rfk.c750 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x3); in _iqk_rxk_setting()
753 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H2, 0x3); in _iqk_rxk_setting()
757 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H2, 0x0); in _iqk_rxk_setting()
1235 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x1f); in _iqk_txk_setting()
1237 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x13); in _iqk_txk_setting()
1695 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0x3); in _set_rx_dck()
Drtw8852c_rfk.c1447 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x1f); in _iqk_macbb_setting()
1448 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x13); in _iqk_macbb_setting()
1952 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, MASKBYTE3, 0x1f); in _dpk_bb_afe_setting()
1953 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, MASKBYTE3, 0x13); in _dpk_bb_afe_setting()
Dreg.h7920 #define R_ANAPAR_PW15 0x030C macro