Searched refs:RING_PSMI_CTL (Results 1 – 10 of 10) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/i915/gt/ |
| D | intel_ring_submission.c | 731 RING_PSMI_CTL(signaller->mmio_base)); in mi_set_context()
784 last_reg = RING_PSMI_CTL(signaller->mmio_base); in mi_set_context()
1018 intel_uncore_write_fw(uncore, RING_PSMI_CTL(GEN6_BSD_RING_BASE), in gen6_bsd_submit_request()
1026 RING_PSMI_CTL(GEN6_BSD_RING_BASE), in gen6_bsd_submit_request()
1039 intel_uncore_write_fw(uncore, RING_PSMI_CTL(GEN6_BSD_RING_BASE), in gen6_bsd_submit_request()
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| D | intel_engine_regs.h | 47 #define RING_PSMI_CTL(base) _MMIO((base) + 0x50) macro
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| D | intel_workarounds.c | 2297 RING_PSMI_CTL(RENDER_RING_BASE), in rcs_engine_wa_init()
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| /linux-6.12.1/drivers/gpu/drm/xe/ |
| D | xe_wa.c | 298 XE_RTP_ACTIONS(SET(RING_PSMI_CTL(RENDER_RING_BASE),
307 XE_RTP_ACTIONS(SET(RING_PSMI_CTL(RENDER_RING_BASE),
316 XE_RTP_ACTIONS(SET(RING_PSMI_CTL(RENDER_RING_BASE),
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| D | xe_hw_engine.c | 443 XE_RTP_ACTIONS(CLR(RING_PSMI_CTL(0), in hw_engine_setup_default_state()
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| /linux-6.12.1/drivers/gpu/drm/xe/regs/ |
| D | xe_engine_regs.h | 60 #define RING_PSMI_CTL(base) XE_REG((base) + 0x50, XE_REG_OPTION_MASKED) macro
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| /linux-6.12.1/drivers/gpu/drm/i915/ |
| D | intel_clock_gating.c | 444 intel_uncore_write(&i915->uncore, RING_PSMI_CTL(RENDER_RING_BASE), in bdw_init_clock_gating()
581 intel_uncore_write(&i915->uncore, RING_PSMI_CTL(RENDER_RING_BASE), in chv_init_clock_gating()
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| D | intel_gvt_mmio_table.c | 1120 MMIO_RING_D(RING_PSMI_CTL); in iterate_bxt_mmio()
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| D | i915_gpu_error.c | 1241 ee->rc_psmi = ENGINE_READ(engine, RING_PSMI_CTL); in engine_record_registers()
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| /linux-6.12.1/drivers/gpu/drm/i915/gt/uc/ |
| D | intel_guc_capture.c | 50 { RING_PSMI_CTL(0), 0, 0, "RC PSMI" }, \
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