Searched refs:R300_PPLL_REF_DIV_ACC_MASK (Results 1 – 5 of 5) sorted by relevance
967 if (pll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { in radeon_set_pll()978 ~R300_PPLL_REF_DIV_ACC_MASK); in radeon_set_pll()
203 (tmp & R300_PPLL_REF_DIV_ACC_MASK) >> R300_PPLL_REF_DIV_ACC_SHIFT; in radeon_get_clock_info()
1527 # define R300_PPLL_REF_DIV_ACC_MASK (0x3ff << 18) macro
999 #define R300_PPLL_REF_DIV_ACC_MASK (0x3ff << 18) macro
1397 if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { in radeon_write_pll_regs()1406 ~R300_PPLL_REF_DIV_ACC_MASK); in radeon_write_pll_regs()