Searched refs:PUNIT_REG_DSPSSPM (Results 1 – 4 of 4) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/i915/ |
D | vlv_sideband_reg.h | 37 #define PUNIT_REG_DSPSSPM 0x36 macro
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/linux-6.12.1/drivers/gpu/drm/i915/display/ |
D | intel_display_power_well.c | 1653 state = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & DP_SSS_MASK(pipe); in chv_pipe_power_well_enabled() 1666 ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & DP_SSC_MASK(pipe); in chv_pipe_power_well_enabled() 1687 ((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & DP_SSS_MASK(pipe)) == state) in chv_set_pipe_power_well() 1692 ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM); in chv_set_pipe_power_well() 1695 vlv_punit_write(dev_priv, PUNIT_REG_DSPSSPM, ctrl); in chv_set_pipe_power_well() 1701 vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM)); in chv_set_pipe_power_well()
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D | intel_cdclk.c | 575 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM); in vlv_get_cdclk() 658 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM); in vlv_set_cdclk() 661 vlv_punit_write(dev_priv, PUNIT_REG_DSPSSPM, val); in vlv_set_cdclk() 662 if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & in vlv_set_cdclk() 742 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM); in chv_set_cdclk() 745 vlv_punit_write(dev_priv, PUNIT_REG_DSPSSPM, val); in chv_set_cdclk() 746 if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & in chv_set_cdclk()
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D | i9xx_wm.c | 124 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM); in chv_set_memory_pm5() 129 vlv_punit_write(dev_priv, PUNIT_REG_DSPSSPM, val); in chv_set_memory_pm5() 3786 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM); in vlv_wm_get_hw_state()
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