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Searched refs:PRIV_STATE (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdkfd/
Dcik_regs.h64 #define PRIV_STATE (1 << 30) macro
Dkfd_mqd_manager_cik.c344 PRIV_STATE | in update_mqd_hiq()
/linux-6.12.1/drivers/gpu/drm/radeon/
Dcikd.h1528 #define PRIV_STATE (1 << 30) macro
Dcik.c4672 PRIV_STATE | KMD_QUEUE; /* assuming kernel queue control */ in cik_cp_compute_resume()
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dmes_v12_0.c1063 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in mes_v12_0_mqd_init()
Dmes_v11_0.c1097 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in mes_v11_0_mqd_init()
Dgfx_v12_0.c2856 tmp = REG_SET_FIELD(tmp, CP_GFX_MQD_CONTROL, PRIV_STATE, 1); in gfx_v12_0_gfx_mqd_init()
3063 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in gfx_v12_0_compute_mqd_init()
Dgfx_v11_0.c3923 tmp = REG_SET_FIELD(tmp, CP_GFX_MQD_CONTROL, PRIV_STATE, 1); in gfx_v11_0_gfx_mqd_init()
4119 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in gfx_v11_0_compute_mqd_init()
Dgfx_v9_4_3.c1881 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in gfx_v9_4_3_xcc_mqd_init()
Dgfx_v10_0.c6631 tmp = REG_SET_FIELD(tmp, CP_GFX_MQD_CONTROL, PRIV_STATE, 1); in gfx_v10_0_gfx_mqd_init()
6846 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in gfx_v10_0_compute_mqd_init()
Dgfx_v8_0.c4469 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in gfx_v8_0_mqd_init()
Dgfx_v9_0.c3560 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in gfx_v9_0_mqd_init()