Searched refs:PIPE_CONFIG (Results 1 – 15 of 15) sorted by relevance
80 #define PIPE_CONFIG(x) ((x) << GB_TILE_MODE0__PIPE_CONFIG__SHIFT) macro406 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()414 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()422 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()430 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()438 PIPE_CONFIG(ADDR_SURF_P4_8x16); in gfx_v6_0_tiling_mode_table_init()441 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()449 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()457 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()466 PIPE_CONFIG(ADDR_SURF_P4_8x16); in gfx_v6_0_tiling_mode_table_init()[all …]
69 #define PIPE_CONFIG(x) ((x) << GB_TILE_MODE0__PIPE_CONFIG__SHIFT) macro2089 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2093 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2097 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2101 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2105 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2109 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2113 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2117 PIPE_CONFIG(ADDR_SURF_P2)); in gfx_v8_0_tiling_mode_table_init()2119 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()[all …]
1017 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1021 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1025 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1029 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1033 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1037 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1040 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1045 PIPE_CONFIG(ADDR_SURF_P4_16x16)); in gfx_v7_0_tiling_mode_table_init()1047 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1050 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()[all …]
190 # define PIPE_CONFIG(x) ((x) << 6) macro
1182 # define PIPE_CONFIG(x) ((x) << 6) macro
1975 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v6_0_crtc_do_set_base()
1843 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v8_0_crtc_do_set_base()
1896 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v10_0_crtc_do_set_base()
1946 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v11_0_crtc_do_set_base()
2359 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2363 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2367 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2371 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2375 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2378 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2382 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2386 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2389 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16)); in cik_tiling_mode_table_init()2391 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()[all …]
2498 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2507 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2516 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2525 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2534 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2543 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2552 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2561 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2570 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2579 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()[all …]
1185 # define PIPE_CONFIG(x) ((x) << 6) macro
1225 # define PIPE_CONFIG(x) ((x) << 6) macro
208 AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()
1696 typedef enum PIPE_CONFIG { enum1712 } PIPE_CONFIG; typedef