Searched refs:OTG_H_TIMING_CNTL (Results 1 – 15 of 15) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn401/ |
| D | dcn401_optc.c | 124 REG_UPDATE(OTG_H_TIMING_CNTL, in optc401_set_odm_combine()
143 REG_UPDATE(OTG_H_TIMING_CNTL, in optc401_set_odm_combine()
155 REG_UPDATE(OTG_H_TIMING_CNTL, in optc401_set_odm_combine()
169 REG_UPDATE(OTG_H_TIMING_CNTL, in optc401_set_h_timing_div_manual_mode()
277 REG_UPDATE(OTG_H_TIMING_CNTL, in optc401_set_odm_bypass()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn314/ |
| D | dcn314_optc.c | 100 REG_UPDATE(OTG_H_TIMING_CNTL, in optc314_set_odm_combine()
178 REG_UPDATE(OTG_H_TIMING_CNTL, in optc314_set_odm_bypass()
190 REG_UPDATE(OTG_H_TIMING_CNTL, in optc314_set_h_timing_div_manual_mode()
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| D | dcn314_optc.h | 46 SRI(OTG_H_TIMING_CNTL, OTG, inst),\
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn32/ |
| D | dcn32_optc.c | 95 REG_UPDATE(OTG_H_TIMING_CNTL, in optc32_set_odm_combine()
135 REG_UPDATE(OTG_H_TIMING_CNTL, in optc32_set_h_timing_div_manual_mode()
242 REG_UPDATE(OTG_H_TIMING_CNTL, in optc32_set_odm_bypass()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn20/ |
| D | dcn20_optc.c | 171 REG_WRITE(OTG_H_TIMING_CNTL, 0); in optc2_set_odm_bypass()
174 REG_UPDATE(OTG_H_TIMING_CNTL, in optc2_set_odm_bypass()
216 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_BY2, 1); in optc2_set_odm_combine()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn31/ |
| D | dcn31_optc.c | 88 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc31_set_odm_combine()
240 REG_SET(OTG_H_TIMING_CNTL, 0, in optc3_init_odm()
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| D | dcn31_optc.h | 45 SRI(OTG_H_TIMING_CNTL, OTG, inst),\
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn30/ |
| D | dcn30_optc.c | 210 REG_UPDATE(OTG_H_TIMING_CNTL, in optc3_set_odm_bypass()
270 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc3_set_odm_combine()
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| D | dcn30_optc.h | 47 SRI(OTG_H_TIMING_CNTL, OTG, inst),\
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn10/ |
| D | dcn10_optc.h | 46 SRI(OTG_H_TIMING_CNTL, OTG, inst),\
118 uint32_t OTG_H_TIMING_CNTL; member
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| D | dcn10_optc.c | 324 REG_UPDATE(OTG_H_TIMING_CNTL, in optc1_program_timing()
327 REG_UPDATE(OTG_H_TIMING_CNTL, in optc1_program_timing()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn35/ |
| D | dcn35_optc.c | 108 REG_UPDATE(OTG_H_TIMING_CNTL, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc35_set_odm_combine()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| D | dcn35_resource.h | 231 SRI_ARR(OTG_H_TIMING_CNTL, OTG, inst),\
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| D | dcn401_resource.h | 490 SRI_ARR(OTG_H_TIMING_CNTL, OTG, inst), SRI_ARR(OTG_V_TOTAL, OTG, inst), \
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| D | dcn32_resource.h | 1008 SRI_ARR(OTG_H_TIMING_CNTL, OTG, inst), SRI_ARR(OTG_V_TOTAL, OTG, inst), \
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