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Searched refs:NUM_PHASES (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/mmc/host/
Ddw_mmc-k3.c48 #define NUM_PHASES (40) macro
376 for (i = 0; i < NUM_PHASES; ++i, ++smpl_phase) { in dw_mci_hi3660_execute_tuning()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dwb_scl.c32 #define NUM_PHASES 16 macro
696 for (phase = 0; phase < (NUM_PHASES / 2 + 1); phase++) { in wbscl_set_scaler_filter()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dpp/dcn401/
Ddcn401_dpp_cm.c35 #define NUM_PHASES 64 macro
Ddcn401_dpp_dscl.c35 #define NUM_PHASES 64 macro
258 for (phase = 0; phase < (NUM_PHASES / 2 + 1); phase++) { in dpp401_dscl_set_scaler_filter()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dpp/dcn10/
Ddcn10_dpp_dscl.c35 #define NUM_PHASES 64 macro
256 for (phase = 0; phase < (NUM_PHASES / 2 + 1); phase++) { in dpp1_dscl_set_scaler_filter()
Ddcn10_dpp.c34 #define NUM_PHASES 64 macro
Ddcn10_dpp_cm.c35 #define NUM_PHASES 64 macro
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dpp/dcn20/
Ddcn20_dpp.c34 #define NUM_PHASES 64 macro