Searched refs:MVPP2_PRS_TCAM_SRAM_SIZE (Results 1 – 3 of 3) sorted by relevance
19 #define MVPP2_PRS_TCAM_SRAM_SIZE 256 macro107 #define MVPP2_PE_VID_FILT_RANGE_END (MVPP2_PRS_TCAM_SRAM_SIZE - 32)111 #define MVPP2_PE_MH_SKIP_PRS (MVPP2_PRS_TCAM_SRAM_SIZE - 31)112 #define MVPP2_PE_IP6_EXT_PROTO_UN (MVPP2_PRS_TCAM_SRAM_SIZE - 30)113 #define MVPP2_PE_IP6_ADDR_UN (MVPP2_PRS_TCAM_SRAM_SIZE - 29)114 #define MVPP2_PE_IP4_ADDR_UN (MVPP2_PRS_TCAM_SRAM_SIZE - 28)115 #define MVPP2_PE_LAST_DEFAULT_FLOW (MVPP2_PRS_TCAM_SRAM_SIZE - 27)116 #define MVPP2_PE_FIRST_DEFAULT_FLOW (MVPP2_PRS_TCAM_SRAM_SIZE - 22)117 #define MVPP2_PE_EDSA_TAGGED (MVPP2_PRS_TCAM_SRAM_SIZE - 21)118 #define MVPP2_PE_EDSA_UNTAGGED (MVPP2_PRS_TCAM_SRAM_SIZE - 20)[all …]
43 struct mvpp2_dbgfs_prs_entry prs_entries[MVPP2_PRS_TCAM_SRAM_SIZE];286 for (i = 0; i < MVPP2_PRS_TCAM_SRAM_SIZE; i++) { in mvpp2_dbgfs_port_parser_show()530 if (tid >= MVPP2_PRS_TCAM_SRAM_SIZE) in mvpp2_dbgfs_prs_entry_init()574 for (i = 0; i < MVPP2_PRS_TCAM_SRAM_SIZE; i++) { in mvpp2_dbgfs_prs_init()
26 if (pe->index > MVPP2_PRS_TCAM_SRAM_SIZE - 1) in mvpp2_prs_hw_write()51 if (tid > MVPP2_PRS_TCAM_SRAM_SIZE - 1) in mvpp2_prs_init_from_hw()370 for (tid = MVPP2_PRS_TCAM_SRAM_SIZE - 1; tid >= 0; tid--) { in mvpp2_prs_flow_find()2125 for (index = 0; index < MVPP2_PRS_TCAM_SRAM_SIZE; index++) { in mvpp2_prs_default_init()2136 for (index = 0; index < MVPP2_PRS_TCAM_SRAM_SIZE; index++) in mvpp2_prs_default_init()2139 priv->prs_shadow = devm_kcalloc(&pdev->dev, MVPP2_PRS_TCAM_SRAM_SIZE, in mvpp2_prs_default_init()2509 if (index > MVPP2_PRS_TCAM_SRAM_SIZE) in mvpp2_prs_hits()