Searched refs:MPLL_TX_CLK_DIV (Results 1 – 2 of 2) sorted by relevance
325 #define MPLL_TX_CLK_DIV(val) REG_FIELD_PREP16(C20_MPLLB_TX_CLK_DIV_MASK, val) macro
2191 pll_state->mpllb[0] = (MPLL_TX_CLK_DIV(mpll_tx_clk_div) | in intel_c20_compute_hdmi_tmds_pll()