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Searched refs:MP1_BASE__INST5_SEG4 (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dcyan_skillfish_ip_offset.h493 #define MP1_BASE__INST5_SEG4 0 macro
Dnavi10_ip_offset.h558 #define MP1_BASE__INST5_SEG4 0 macro
Dvega20_ip_offset.h583 #define MP1_BASE__INST5_SEG4 0 macro
Dnavi14_ip_offset.h731 #define MP1_BASE__INST5_SEG4 0 macro
Dnavi12_ip_offset.h731 #define MP1_BASE__INST5_SEG4 0 macro
Ddimgrey_cavefish_ip_offset.h743 #define MP1_BASE__INST5_SEG4 0 macro
Dsienna_cichlid_ip_offset.h738 #define MP1_BASE__INST5_SEG4 0 macro
Dbeige_goby_ip_offset.h870 #define MP1_BASE__INST5_SEG4 0 macro
Drenoir_ip_offset.h981 #define MP1_BASE__INST5_SEG4 0 macro
Dvangogh_ip_offset.h993 #define MP1_BASE__INST5_SEG4 0 macro
Dyellow_carp_offset.h914 #define MP1_BASE__INST5_SEG4 0 macro
Darct_ip_offset.h731 #define MP1_BASE__INST5_SEG4 0 macro
Daldebaran_ip_offset.h1042 #define MP1_BASE__INST5_SEG4 0 macro