Searched refs:MC_SEQ_WR_CTL_D0_LP (Results 1 – 12 of 12) sorted by relevance
151 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
1849 *out_reg = MC_SEQ_WR_CTL_D0_LP >> 2; in btc_check_s0_mc_reg_index()2006 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in btc_initialize_mc_reg_table()
809 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
577 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
702 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
327 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
2795 *out_reg = MC_SEQ_WR_CTL_D0_LP >> 2; in ni_check_s0_mc_reg_index()2893 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in ni_initialize_mc_reg_table()
998 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_WR_CTL_D0_LP >> 2; in cypress_set_mc_reg_address_table()
4405 *out_reg = MC_SEQ_WR_CTL_D0_LP >> 2; in ci_check_s0_mc_reg_index()4605 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in ci_initialize_mc_reg_table()
5386 *out_reg = MC_SEQ_WR_CTL_D0_LP >> 2; in si_check_s0_mc_reg_index()5488 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in si_initialize_mc_reg_table()
578 #define MC_SEQ_WR_CTL_D0_LP 0xA9F macro
5919 *out_reg = MC_SEQ_WR_CTL_D0_LP; in si_check_s0_mc_reg_index()6021 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in si_initialize_mc_reg_table()