Searched refs:MC_SEQ_MISC0_GDDR5_SHIFT (Results 1 – 12 of 12) sorted by relevance
120 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro
210 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro791 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro
286 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro
558 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro
683 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro
652 mem_type = (RREG32(MC_SEQ_MISC0) & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT; in ni_mc_load_microcode()
1598 if (((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT) == in rv770_get_memory_type()
5056 if (((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT) == in ci_get_memory_type()
3148 …ddr5 = (MC_SEQ_MISC0_GDDR5_VALUE == ((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT)); in si_is_special_1gb_platform()
559 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro
79 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro
3665 …ddr5 = (MC_SEQ_MISC0_GDDR5_VALUE == ((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT)); in si_is_special_1gb_platform()