Searched refs:MC_SEQ_MISC0_GDDR5_MASK (Results 1 – 12 of 12) sorted by relevance
121 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
211 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro792 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
287 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
559 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
684 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
652 mem_type = (RREG32(MC_SEQ_MISC0) & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT; in ni_mc_load_microcode()
1598 if (((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT) == in rv770_get_memory_type()
5056 if (((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT) == in ci_get_memory_type()
3148 …is_memory_gddr5 = (MC_SEQ_MISC0_GDDR5_VALUE == ((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GD… in si_is_special_1gb_platform()
560 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
80 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
3665 …is_memory_gddr5 = (MC_SEQ_MISC0_GDDR5_VALUE == ((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GD… in si_is_special_1gb_platform()