Searched refs:MC_SEQ_CNTL_3 (Results 1 – 3 of 3) sorted by relevance
785 #define MC_SEQ_CNTL_3 0x3600 macro
1455 WREG32_P(MC_SEQ_CNTL_3, CAC_EN, ~CAC_EN); in ci_enable_sclk_mclk_dpm()
1231 PHM_WRITE_FIELD(hwmgr->device, MC_SEQ_CNTL_3, CAC_EN, 0x1); in smu7_enable_sclk_mclk_dpm()