Searched refs:KVM_REG_RISCV_FP_D (Results 1 – 4 of 4) sorted by relevance
388 __u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_FP_D); in fp_d_id_to_str()390 assert((id & KVM_REG_RISCV_TYPE_MASK) == KVM_REG_RISCV_FP_D); in fp_d_id_to_str()649 case KVM_REG_RISCV_FP_D: in print_reg()821 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[0]),822 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[1]),823 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[2]),824 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[3]),825 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[4]),826 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[5]),827 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[6]),[all …]
100 } else if ((rtype == KVM_REG_RISCV_FP_D) && in kvm_riscv_vcpu_get_reg_fp()145 } else if ((rtype == KVM_REG_RISCV_FP_D) && in kvm_riscv_vcpu_set_reg_fp()
960 KVM_REG_RISCV_FP_D | i; in copy_fp_d_reg_indices()970 reg = KVM_REG_RISCV | KVM_REG_SIZE_U32 | KVM_REG_RISCV_FP_D | i; in copy_fp_d_reg_indices()1222 case KVM_REG_RISCV_FP_D: in kvm_riscv_vcpu_set_reg()1224 KVM_REG_RISCV_FP_D); in kvm_riscv_vcpu_set_reg()1255 case KVM_REG_RISCV_FP_D: in kvm_riscv_vcpu_get_reg()1257 KVM_REG_RISCV_FP_D); in kvm_riscv_vcpu_get_reg()
252 #define KVM_REG_RISCV_FP_D (0x06 << KVM_REG_RISCV_TYPE_SHIFT) macro