Searched refs:JH7100_CLK_SDIO0_AHB (Results 1 – 3 of 3) sorted by relevance
123 #define JH7100_CLK_SDIO0_AHB 114 macro
191 JH71X0_GATE(JH7100_CLK_SDIO0_AHB, "sdio0_ahb", 0, JH7100_CLK_AHB_BUS),
188 clocks = <&clkgen JH7100_CLK_SDIO0_AHB>,