Searched refs:JH7100_CLK_PWM_APB (Results 1 – 3 of 3) sorted by relevance
190 #define JH7100_CLK_PWM_APB 181 macro
263 JH71X0_GATE(JH7100_CLK_PWM_APB, "pwm_apb", 0, JH7100_CLK_APB2_BUS),
366 clocks = <&clkgen JH7100_CLK_PWM_APB>;