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Searched refs:InterlaceEnable (Results 1 – 15 of 15) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_mode_structs.h112 unsigned int InterlaceEnable; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_mode_vba_util_32.h670 unsigned int InterlaceEnable,
Ddisplay_mode_vba_util_32.c2064 myPipe[k].InterlaceEnable, in dml32_CalculateVMRowAndSwath()
2138 myPipe[k].InterlaceEnable, in dml32_CalculateVMRowAndSwath()
3199 unsigned int InterlaceEnable, in dml32_CalculateVUpdateAndDynamicMetadataParameters() argument
3228 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) in dml32_CalculateVUpdateAndDynamicMetadataParameters()
3505 myPipe->InterlaceEnable, in dml32_CalculatePrefetchSchedule()
3587 …if (v->OutputFormat[k] == dm_420 || (myPipe->InterlaceEnable && myPipe->ProgressiveToInterlaceUnit… in dml32_CalculatePrefetchSchedule()
Ddisplay_mode_vba_32.c437 …chParametersWatermarksAndPerformanceCalculation.SurfaceParameters[k].InterlaceEnable = mode_lib->v… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
774 …eepSleepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe.InterlaceEnable = mode_lib->v… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2730 …v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.SurfParameters[k].InterlaceEnable = mode… in dml32_ModeSupportAndSystemConfigurationFull()
3279 …v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe.InterlaceEnable = mode_lib->vba.I… in dml32_ModeSupportAndSystemConfigurationFull()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_mode_vba_30.c54 unsigned int InterlaceEnable; member
288 int InterlaceEnable,
926 myPipe->InterlaceEnable, in CalculatePrefetchSchedule()
977 if (OutputFormat == dm_420 || (myPipe->InterlaceEnable && ProgressiveToInterlaceUnitInOPP)) in CalculatePrefetchSchedule()
2442 myPipe.InterlaceEnable = v->Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3281 …long DynamicMetadataLinesBeforeActiveRequired, int InterlaceEnable, bool ProgressiveToInterlaceUni… in CalculateDynamicMetadataParameters() argument
3300 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) { in CalculateDynamicMetadataParameters()
4775 myPipe.InterlaceEnable = v->Interlace[k]; in dml30_ModeSupportAndSystemConfigurationFull()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_mode_vba_31.c76 unsigned int InterlaceEnable; member
282 int InterlaceEnable,
935 myPipe->InterlaceEnable,
1009 if (OutputFormat == dm_420 || (myPipe->InterlaceEnable && myPipe->ProgressiveToInterlaceUnitInOPP))
2610 myPipe.InterlaceEnable = v->Interlace[k];
3414 int InterlaceEnable, argument
3438 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) {
3699 myPipe.InterlaceEnable = v->Interlace[k];
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_mode_vba_314.c74 unsigned int InterlaceEnable; member
291 int InterlaceEnable,
953 myPipe->InterlaceEnable,
1027 if (OutputFormat == dm_420 || (myPipe->InterlaceEnable && myPipe->ProgressiveToInterlaceUnitInOPP))
2629 myPipe.InterlaceEnable = v->Interlace[k];
3520 int InterlaceEnable, argument
3544 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) {
3805 myPipe.InterlaceEnable = v->Interlace[k];
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
Ddml2_core_shared_types.h117 unsigned int InterlaceEnable; member
Ddml2_core_shared.c496 unsigned int InterlaceEnable,
1666 …s->SurfParameters[k].InterlaceEnable = display_cfg->stream_descriptors[display_cfg->plane_descript… in dml2_core_shared_mode_support()
2307 …myPipe->InterlaceEnable = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream… in dml2_core_shared_mode_support()
5633 p->myPipe[k].InterlaceEnable, in CalculateVMRowAndSwath()
5711 p->myPipe[k].InterlaceEnable, in CalculateVMRowAndSwath()
7287 unsigned int InterlaceEnable, in CalculateVUpdateAndDynamicMetadataParameters() argument
7313 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) { in CalculateVUpdateAndDynamicMetadataParameters()
7602 p->myPipe->InterlaceEnable, in CalculatePrefetchSchedule()
7681 …if (p->OutputFormat == dml2_420 || (p->myPipe->InterlaceEnable && p->myPipe->ProgressiveToInterlac… in CalculatePrefetchSchedule()
10187 …s->SurfaceParameters[k].InterlaceEnable = display_cfg->stream_descriptors[display_cfg->plane_descr… in dml2_core_shared_mode_programming()
[all …]
Ddml2_core_dcn4_calcs.c2963 p->myPipe[k].InterlaceEnable, in CalculateVMRowAndSwath()
3041 p->myPipe[k].InterlaceEnable, in CalculateVMRowAndSwath()
4760 unsigned int InterlaceEnable, in CalculateVUpdateAndDynamicMetadataParameters() argument
4786 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) { in CalculateVUpdateAndDynamicMetadataParameters()
5126 p->myPipe->InterlaceEnable, in CalculatePrefetchSchedule()
5206 …if (p->OutputFormat == dml2_420 || (p->myPipe->InterlaceEnable && p->myPipe->ProgressiveToInterlac… in CalculatePrefetchSchedule()
7999 …s->SurfParameters[k].InterlaceEnable = display_cfg->stream_descriptors[display_cfg->plane_descript… in dml_core_mode_support()
8663 …myPipe->InterlaceEnable = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream… in dml_core_mode_support()
10312 …s->SurfaceParameters[k].InterlaceEnable = display_cfg->stream_descriptors[display_cfg->plane_descr… in dml_core_mode_programming()
10782 …myPipe->InterlaceEnable = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream… in dml_core_mode_programming()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_mode_vba_21.c53 unsigned int InterlaceEnable; member
746 if (OutputFormat == dm_420 || (myPipe->InterlaceEnable && ProgressiveToInterlaceUnitInOPP)) in CalculatePrefetchSchedule()
779 if (myPipe->InterlaceEnable && !ProgressiveToInterlaceUnitInOPP) in CalculatePrefetchSchedule()
2151 myPipe.InterlaceEnable = mode_lib->vba.Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3445 myPipe.InterlaceEnable = mode_lib->vba.Interlace[k]; in CalculatePrefetchSchedulePerPlane()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/
Ddisplay_mode_core.c361 dml_uint_t InterlaceEnable,
1064 p->myPipe->InterlaceEnable, in CalculatePrefetchSchedule()
1138 …if (p->OutputFormat == dml_420 || (p->myPipe->InterlaceEnable && p->myPipe->ProgressiveToInterlace… in CalculatePrefetchSchedule()
1857 dml_uint_t InterlaceEnable, in CalculateVUpdateAndDynamicMetadataParameters() argument
1883 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) { in CalculateVUpdateAndDynamicMetadataParameters()
5129 p->myPipe[k].InterlaceEnable, in CalculateVMRowAndSwath()
5202 p->myPipe[k].InterlaceEnable, in CalculateVMRowAndSwath()
6373 myPipe->InterlaceEnable = mode_lib->ms.cache_display_cfg.timing.Interlace[k]; in dml_prefetch_check()
7657 s->SurfParameters[k].InterlaceEnable = mode_lib->ms.cache_display_cfg.timing.Interlace[k]; in dml_core_mode_support()
8669 s->SurfaceParameters[k].InterlaceEnable = mode_lib->ms.cache_display_cfg.timing.Interlace[k]; in dml_core_mode_programming()
[all …]
Ddisplay_mode_core_structs.h412 dml_uint_t InterlaceEnable; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_mode_vba_20.c104 bool InterlaceEnable,
487 bool InterlaceEnable, in CalculatePrefetchSchedule()
537 if (OutputFormat == dm_420 || (InterlaceEnable && ProgressiveToInterlaceUnitInOPP)) in CalculatePrefetchSchedule()
570 if (InterlaceEnable && !ProgressiveToInterlaceUnitInOPP) in CalculatePrefetchSchedule()
Ddisplay_mode_vba_20v2.c129 bool InterlaceEnable,
579 bool InterlaceEnable, in CalculatePrefetchSchedule()
633 if (InterlaceEnable && !ProgressiveToInterlaceUnitInOPP) in CalculatePrefetchSchedule()