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Searched refs:INSTANCE_BROADCAST_WRITES (Results 1 – 25 of 26) sorted by relevance

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/linux-6.12.1/drivers/gpu/drm/radeon/
Dni.c1069 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1070 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1089 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1090 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1098 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in cayman_gpu_init()
1099 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in cayman_gpu_init()
Devergreen.c3464 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3465 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3485 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3486 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3494 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in evergreen_gpu_init()
3495 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in evergreen_gpu_init()
Dnid.h298 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Dsid.h1003 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Dcikd.h1632 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Devergreend.h415 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Dsi.c2930 u32 data = INSTANCE_BROADCAST_WRITES; in si_select_se_sh()
Dcik.c3029 u32 data = INSTANCE_BROADCAST_WRITES; in cik_select_se_sh()
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v12.c175 INSTANCE_BROADCAST_WRITES, 1); in wave_control_execute_v12()
Dimu_v12_0.c291 REG_GET_FIELD(data, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES) << 20 | in imu_v12_0_grbm_gfx_index_remap()
Damdgpu_amdkfd_gfx_v8.c554 INSTANCE_BROADCAST_WRITES, 1); in kgd_wave_control_execute()
Damdgpu_amdkfd_gfx_v10_3.c601 INSTANCE_BROADCAST_WRITES, 1); in wave_control_execute_v10_3()
Damdgpu_amdkfd_gfx_v11.c586 INSTANCE_BROADCAST_WRITES, 1); in wave_control_execute_v11()
Damdgpu_amdkfd_gfx_v10.c689 INSTANCE_BROADCAST_WRITES, 1); in kgd_wave_control_execute()
Damdgpu_amdkfd_gfx_v9.c639 INSTANCE_BROADCAST_WRITES, 1); in kgd_gfx_v9_wave_control_execute()
Dgfx_v9_4.c100 INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_4_select_se_sh()
Dsid.h1001 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Dgfx_v9_4_2.c854 INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_4_2_select_se_sh()
Dgfx_v6_0.c1292 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v6_0_select_se_sh()
Dgfx_v7_0.c1556 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v7_0_select_se_sh()
Dgfx_v9_4_3.c699 INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_4_3_xcc_select_se_sh()
Dgfx_v12_0.c1536 INSTANCE_BROADCAST_WRITES, 1); in gfx_v12_0_select_se_sh()
Dgfx_v8_0.c3400 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
Dgfx_v11_0.c1776 INSTANCE_BROADCAST_WRITES, 1); in gfx_v11_0_select_se_sh()
Dgfx_v9_0.c2452 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_0_select_se_sh()

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