Searched refs:HDMI_ACR_N_44 (Results 1 – 15 of 15) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_stream_encoder.h | 185 SE_SF(HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
263 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
457 uint8_t HDMI_ACR_N_44; member
589 uint32_t HDMI_ACR_N_44; member
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| D | dce_stream_encoder.c | 1309 REG_UPDATE(HDMI_ACR_44_1, HDMI_ACR_N_44, audio_clock_info.n_44khz); in dce110_se_setup_hdmi_audio()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn32/ |
| D | dcn32_dio_stream_encoder.h | 80 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| D | dcn401_dio_stream_encoder.h | 82 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| D | dcn10_stream_encoder.h | 255 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
471 type HDMI_ACR_N_44;\
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| D | dcn10_stream_encoder.c | 1295 REG_UPDATE(HDMI_ACR_44_1, HDMI_ACR_N_44, audio_clock_info.n_44khz); in enc1_se_setup_hdmi_audio()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn35/ |
| D | dcn35_dio_stream_encoder.h | 160 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn30/ |
| D | dcn30_dio_stream_encoder.h | 159 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
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| D | dcn30_dio_stream_encoder.c | 800 REG_UPDATE(HDMI_ACR_44_1, HDMI_ACR_N_44, audio_clock_info.n_44khz); in enc3_se_setup_hdmi_audio()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn314/ |
| D | dcn314_dio_stream_encoder.h | 159 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
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| /linux-6.12.1/drivers/gpu/drm/radeon/ |
| D | rv770d.h | 794 # define HDMI_ACR_N_44(x) (((x) & 0xfffff) << 0) macro
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| D | evergreend.h | 648 # define HDMI_ACR_N_44(x) (((x) & 0xfffff) << 0) macro
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | dce_v6_0.c | 1453 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz); in dce_v6_0_audio_set_acr()
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| D | dce_v10_0.c | 1502 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz); in dce_v10_0_afmt_update_ACR()
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| D | dce_v11_0.c | 1551 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz); in dce_v11_0_afmt_update_ACR()
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