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Searched refs:GCC_PCIE_0_NOCSR_COM_PHY_BCR (Results 1 – 22 of 22) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dqcom,qdu1000-gcc.h150 #define GCC_PCIE_0_NOCSR_COM_PHY_BCR 5 macro
Dqcom,sm4450-gcc.h169 #define GCC_PCIE_0_NOCSR_COM_PHY_BCR 5 macro
Dqcom,gcc-sm8450.h205 #define GCC_PCIE_0_NOCSR_COM_PHY_BCR 6 macro
Dqcom,sm8550-gcc.h189 #define GCC_PCIE_0_NOCSR_COM_PHY_BCR 5 macro
Dqcom,sm8650-gcc.h212 #define GCC_PCIE_0_NOCSR_COM_PHY_BCR 5 macro
Dqcom,gcc-sm8350.h220 #define GCC_PCIE_0_NOCSR_COM_PHY_BCR 6 macro
Dqcom,gcc-sm8250.h218 #define GCC_PCIE_0_NOCSR_COM_PHY_BCR 6 macro
Dqcom,gcc-msm8998.h283 #define GCC_PCIE_0_NOCSR_COM_PHY_BCR 77 macro
Dqcom,sa8775p-gcc.h271 #define GCC_PCIE_0_NOCSR_COM_PHY_BCR 9 macro
Dqcom,gcc-sc8280xp.h405 #define GCC_PCIE_0_NOCSR_COM_PHY_BCR 3 macro
Dqcom,x1e80100-gcc.h402 #define GCC_PCIE_0_NOCSR_COM_PHY_BCR 5 macro
/linux-6.12.1/drivers/clk/qcom/
Dgcc-qdu1000.c2595 [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x9e020 },
Dgcc-sm4450.c2769 [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x7c020 },
Dgcc-sm8450.c3177 [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x7c020 },
Dgcc-sm8550.c3251 [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 },
Dgcc-msm8998.c3286 [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 },
Dgcc-sm8250.c3542 [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 },
Dgcc-sm8650.c3709 [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 },
Dgcc-sm8350.c3717 [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 },
Dgcc-sa8775p.c4564 [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0xbf008 },
Dgcc-x1e80100.c6624 [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 },
Dgcc-sc8280xp.c7377 [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 },