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Searched refs:D_ALL (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/i915/gvt/
Dcmd_parser.c2038 {"MI_NOOP", OP_MI_NOOP, F_LEN_CONST, R_ALL, D_ALL, 0, 1, NULL},
2040 {"MI_SET_PREDICATE", OP_MI_SET_PREDICATE, F_LEN_CONST, R_ALL, D_ALL,
2043 {"MI_USER_INTERRUPT", OP_MI_USER_INTERRUPT, F_LEN_CONST, R_ALL, D_ALL,
2047 D_ALL, 0, 1, cmd_handler_mi_wait_for_event},
2049 {"MI_FLUSH", OP_MI_FLUSH, F_LEN_CONST, R_ALL, D_ALL, 0, 1, NULL},
2051 {"MI_ARB_CHECK", OP_MI_ARB_CHECK, F_LEN_CONST, R_ALL, D_ALL, 0, 1,
2054 {"MI_RS_CONTROL", OP_MI_RS_CONTROL, F_LEN_CONST, R_RCS, D_ALL, 0, 1,
2057 {"MI_REPORT_HEAD", OP_MI_REPORT_HEAD, F_LEN_CONST, R_ALL, D_ALL, 0, 1,
2060 {"MI_ARB_ON_OFF", OP_MI_ARB_ON_OFF, F_LEN_CONST, R_ALL, D_ALL, 0, 1,
2064 D_ALL, 0, 1, NULL},
[all …]
Dhandlers.c2188 MMIO_RING_DFH(RING_IMR, D_ALL, 0, NULL, in init_generic_mmio_info()
2191 MMIO_DFH(SDEIMR, D_ALL, 0, NULL, intel_vgpu_reg_imr_handler); in init_generic_mmio_info()
2192 MMIO_DFH(SDEIER, D_ALL, 0, NULL, intel_vgpu_reg_ier_handler); in init_generic_mmio_info()
2193 MMIO_DFH(SDEIIR, D_ALL, 0, NULL, intel_vgpu_reg_iir_handler); in init_generic_mmio_info()
2195 MMIO_RING_DFH(RING_HWSTAM, D_ALL, 0, NULL, NULL); in init_generic_mmio_info()
2201 MMIO_GM_RDR(BSD_HWS_PGA_GEN7, D_ALL, NULL, NULL); in init_generic_mmio_info()
2202 MMIO_GM_RDR(BLT_HWS_PGA_GEN7, D_ALL, NULL, NULL); in init_generic_mmio_info()
2203 MMIO_GM_RDR(VEBOX_HWS_PGA_GEN7, D_ALL, NULL, NULL); in init_generic_mmio_info()
2206 MMIO_RING_DFH(RING_REG, D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2210 MMIO_RING_DFH(RING_REG, D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
[all …]
Dmmio.h57 #define D_ALL (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL) macro