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Searched refs:DISP_CC_MDSS_ESC0_CLK_SRC (Results 1 – 25 of 31) sorted by relevance

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/linux-6.12.1/include/dt-bindings/clock/
Dqcom,dispcc-qcm2290.h18 #define DISP_CC_MDSS_ESC0_CLK_SRC 8 macro
Dqcom,sm6115-dispcc.h19 #define DISP_CC_MDSS_ESC0_CLK_SRC 9 macro
Dqcom,sm6375-dispcc.h19 #define DISP_CC_MDSS_ESC0_CLK_SRC 8 macro
Dqcom,dispcc-sm6125.h25 #define DISP_CC_MDSS_ESC0_CLK_SRC 16 macro
Dqcom,dispcc-sm6350.h29 #define DISP_CC_MDSS_ESC0_CLK_SRC 18 macro
Dqcom,dispcc-sc7180.h28 #define DISP_CC_MDSS_ESC0_CLK_SRC 19 macro
Dqcom,sm4450-dispcc.h18 #define DISP_CC_MDSS_ESC0_CLK_SRC 8 macro
Dqcom,dispcc-sdm845.h19 #define DISP_CC_MDSS_ESC0_CLK_SRC 9 macro
Dqcom,dispcc-sc7280.h36 #define DISP_CC_MDSS_ESC0_CLK_SRC 26 macro
Dqcom,dispcc-sm8150.h39 #define DISP_CC_MDSS_ESC0_CLK_SRC 29 macro
Dqcom,dispcc-sm8350.h39 #define DISP_CC_MDSS_ESC0_CLK_SRC 29 macro
Dqcom,dispcc-sm8250.h39 #define DISP_CC_MDSS_ESC0_CLK_SRC 29 macro
Dqcom,dispcc-sc8280xp.h66 #define DISP_CC_MDSS_ESC0_CLK_SRC 56 macro
Dqcom,x1e80100-dispcc.h64 #define DISP_CC_MDSS_ESC0_CLK_SRC 54 macro
Dqcom,sm8550-dispcc.h67 #define DISP_CC_MDSS_ESC0_CLK_SRC 57 macro
Dqcom,sm8650-dispcc.h67 #define DISP_CC_MDSS_ESC0_CLK_SRC 57 macro
Dqcom,sm8450-dispcc.h66 #define DISP_CC_MDSS_ESC0_CLK_SRC 56 macro
/linux-6.12.1/drivers/clk/qcom/
Ddispcc-qcm2290.c473 [DISP_CC_MDSS_ESC0_CLK_SRC] = &disp_cc_mdss_esc0_clk_src.clkr,
Ddispcc-sm6375.c525 [DISP_CC_MDSS_ESC0_CLK_SRC] = &disp_cc_mdss_esc0_clk_src.clkr,
Ddispcc-sm6115.c538 [DISP_CC_MDSS_ESC0_CLK_SRC] = &disp_cc_mdss_esc0_clk_src.clkr,
Ddispcc-sm6125.c634 [DISP_CC_MDSS_ESC0_CLK_SRC] = &disp_cc_mdss_esc0_clk_src.clkr,
Ddispcc-sc7180.c661 [DISP_CC_MDSS_ESC0_CLK_SRC] = &disp_cc_mdss_esc0_clk_src.clkr,
Ddispcc-sm4450.c683 [DISP_CC_MDSS_ESC0_CLK_SRC] = &disp_cc_mdss_esc0_clk_src.clkr,
Ddispcc-sm6350.c710 [DISP_CC_MDSS_ESC0_CLK_SRC] = &disp_cc_mdss_esc0_clk_src.clkr,
Ddispcc-sdm845.c798 [DISP_CC_MDSS_ESC0_CLK_SRC] = &disp_cc_mdss_esc0_clk_src.clkr,

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