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Searched refs:DISP_CC_MDSS_BYTE0_INTF_CLK (Results 1 – 25 of 47) sorted by relevance

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/linux-6.12.1/include/dt-bindings/clock/
Dqcom,dispcc-qcm2290.h16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
Dqcom,sm6115-dispcc.h17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 7 macro
Dqcom,sm6375-dispcc.h17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
Dqcom,dispcc-sm6125.h14 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 macro
Dqcom,dispcc-sm6350.h17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
Dqcom,dispcc-sc7180.h16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 7 macro
Dqcom,sm4450-dispcc.h16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
Dqcom,dispcc-sdm845.h14 #define DISP_CC_MDSS_BYTE0_INTF_CLK 4 macro
Dqcom,dispcc-sc7280.h16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
Dqcom,dispcc-sm8150.h15 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 macro
Dqcom,dispcc-sm8350.h15 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 macro
Dqcom,dispcc-sm8250.h15 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 macro
Dqcom,dispcc-sc8280xp.h20 #define DISP_CC_MDSS_BYTE0_INTF_CLK 10 macro
Dqcom,x1e80100-dispcc.h17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 7 macro
Dqcom,sm8550-dispcc.h17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 7 macro
Dqcom,sm8650-dispcc.h17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 7 macro
Dqcom,sm8450-dispcc.h16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
/linux-6.12.1/drivers/clk/qcom/
Ddispcc-qcm2290.c471 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
Ddispcc-sm6375.c523 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
Ddispcc-sm6115.c536 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
Ddispcc-sm6125.c623 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
Ddispcc-sc7180.c648 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
Ddispcc-sm4450.c681 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
Ddispcc-sm6350.c697 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
Ddispcc-sdm845.c776 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,

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