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Searched refs:DDR3PHY_DX0DLLCR (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/include/soc/at91/
Dsama7-ddr.h49 #define DDR3PHY_DX0DLLCR (0x1CC) /* DDR3PHY DATX8 DLL Control Register */ macro
/linux-6.12.1/arch/arm/mach-at91/
Dpm_suspend.S186 ldr tmp1, [r3, #DDR3PHY_DX0DLLCR]
188 str tmp1, [r3, #DDR3PHY_DX0DLLCR]
240 ldr tmp1, [r3, #DDR3PHY_DX0DLLCR]
242 str tmp1, [r3, #DDR3PHY_DX0DLLCR]