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Searched refs:DC_HPD5_INT_CONTROL (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/radeon/
Dr600.c900 tmp = RREG32(DC_HPD5_INT_CONTROL); in r600_hpd_set_polarity()
905 WREG32(DC_HPD5_INT_CONTROL, tmp); in r600_hpd_set_polarity()
3641 tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY; in r600_disable_interrupt_state()
3642 WREG32(DC_HPD5_INT_CONTROL, tmp); in r600_disable_interrupt_state()
3789 hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~DC_HPDx_INT_EN; in r600_irq_set()
3885 WREG32(DC_HPD5_INT_CONTROL, hpd5); in r600_irq_set()
3989 tmp = RREG32(DC_HPD5_INT_CONTROL); in r600_irq_ack()
3991 WREG32(DC_HPD5_INT_CONTROL, tmp); in r600_irq_ack()
Dcik.c6917 tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY; in cik_disable_interrupt_state()
6918 WREG32(DC_HPD5_INT_CONTROL, tmp); in cik_disable_interrupt_state()
7045 hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in cik_irq_set()
7267 WREG32(DC_HPD5_INT_CONTROL, hpd5); in cik_irq_set()
7384 tmp = RREG32(DC_HPD5_INT_CONTROL); in cik_irq_ack()
7386 WREG32(DC_HPD5_INT_CONTROL, tmp); in cik_irq_ack()
7414 tmp = RREG32(DC_HPD5_INT_CONTROL); in cik_irq_ack()
7416 WREG32(DC_HPD5_INT_CONTROL, tmp); in cik_irq_ack()
Dsid.h884 #define DC_HPD5_INT_CONTROL 0x6050 macro
Dcikd.h958 #define DC_HPD5_INT_CONTROL 0x6050 macro
Devergreend.h1350 #define DC_HPD5_INT_CONTROL 0x6050 macro
Dr600d.h861 #define DC_HPD5_INT_CONTROL 0x7dc4 macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsid.h887 #define DC_HPD5_INT_CONTROL 0x1814 macro