Searched refs:CP_RB1_BASE (Results 1 – 5 of 5) sorted by relevance
499 #define CP_RB1_BASE 0xC180 macro
1266 #define CP_RB1_BASE 0xC180 macro
1622 CP_RB1_BASE, in cayman_cp_resume()
3699 WREG32(CP_RB1_BASE, ring->gpu_addr >> 8); in si_cp_resume()
1294 #define CP_RB1_BASE 0x3060 macro