Searched refs:CP_PQ_WPTR_POLL_CNTL (Results 1 – 9 of 9) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/radeon/ |
| D | cikd.h | 1355 #define CP_PQ_WPTR_POLL_CNTL 0xC20C macro
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| D | cik.c | 4191 tmp = RREG32(CP_PQ_WPTR_POLL_CNTL); in cik_compute_stop()
4193 WREG32(CP_PQ_WPTR_POLL_CNTL, tmp); in cik_compute_stop()
4610 tmp = RREG32(CP_PQ_WPTR_POLL_CNTL); in cik_cp_compute_resume()
4612 WREG32(CP_PQ_WPTR_POLL_CNTL, tmp); in cik_cp_compute_resume()
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_4_3.c | 1933 WREG32_FIELD15_PREREG(GC, GET_INST(GC, xcc_id), CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v9_4_3_xcc_kiq_init_register()
2323 WREG32_FIELD15_PREREG(GC, GET_INST(GC, xcc_id), CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v9_4_3_xcc_fini()
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| D | gfx_v9_0.c | 3611 WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v9_0_kiq_init_register()
4024 WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v9_0_hw_fini()
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| D | gfx_v7_0.c | 2945 tmp = REG_SET_FIELD(tmp, CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v7_0_mqd_commit()
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| D | gfx_v12_0.c | 3130 WREG32_FIELD15_PREREG(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v12_0_kiq_init_register()
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| D | gfx_v8_0.c | 4564 WREG32_FIELD(CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v8_0_mqd_commit()
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| D | gfx_v11_0.c | 4186 WREG32_FIELD15_PREREG(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v11_0_kiq_init_register()
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| D | gfx_v10_0.c | 6896 WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v10_0_kiq_init_register()
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